327 matching jobs

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Broadcom

Product Owner

Durham, North Carolina, United States

Full time
Regular

Added Oct 5, 2026

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Broadcom

Design Verification Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

Added Oct 5, 2026

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Broadcom

Lead ASIC Design Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

Added Oct 5, 2026

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Broadcom

Design Verification Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

Added Oct 5, 2026

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Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

Added Oct 5, 2026

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Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

Added Oct 5, 2026

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Broadcom

Product Manager

Pittsburgh, Pennsylvania, United States

Full time
Regular

Pay posted by employer$104,100–$166,500 USD per year

Added Oct 5, 2026

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Broadcom

PCIe Verification Engr

Bengaluru, India

Full time
Regular

Added Oct 5, 2026

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Broadcom

A-Shift Material Handler

Breinigsville, Pennsylvania, United States

Full time
Regular

Pay posted by employer$24.00–$29.00 USD per hour

Added Oct 5, 2026

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Broadcom

Wafer Fab Material Handler

Breinigsville, Pennsylvania, United States

Full time
Regular

Pay posted by employer$24.00–$29.00 USD per hour

Added Oct 5, 2026

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Broadcom

IC Design Manager

Penang, Malaysia

Full time
Regular

Added Oct 5, 2026

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Broadcom

Mixed Signal Digital Design Lead

Fort Collins, Colorado, United States +1 location

Full time
Regular

Pay posted by employer$121,900–$195,000 USD per year

Added Oct 5, 2026

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Broadcom

Analog & RF IC Senior Layout Engineer

Irvine, California, United States +1 location

Full time
Regular

Pay posted by employer$109,700–$175,500 USD per year

Added Oct 5, 2026

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Broadcom

IC R&D Hardware Engineer

Yishun New Town, Singapore

Full time
Regular

Added Oct 5, 2026

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Broadcom

Mainframe Software Development Engineer in Test

Lisle, Illinois, United States

Full time
Regular

Pay posted by employer$109,700–$175,500 USD per year

Added Oct 5, 2026

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Broadcom

R&D Engineer IC Design 4

San Jose, California, United States +1 location 2 postings

Full time
Regular

Pay posted by employer$121,900–$195,000 USD per year

Added Oct 5, 2026

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Broadcom

Analog/Mixed Signal Verilog Modeling Design Engineer

Irvine, California, United States +1 location

Full time
Regular

Added Oct 5, 2026

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Broadcom

Test Product Engineer

Penang, Malaysia

Full time
Regular

Added Oct 5, 2026

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Broadcom

Senior / Staff NPI Product Engineer

Penang, Malaysia

Full time
Regular

Added Oct 5, 2026

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Broadcom

Staff Semiconductor Power Engineer (ICB4)

San Jose, California, United States

Full time
Regular

Pay posted by employer$121,900–$195,000 USD per year

Added Oct 5, 2026

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Broadcom

Mixed Signal Digital Design Lead

Fort Collins, Colorado, United States +1 more

Full time
Regular

Pay posted by employer$121,900–$195,000 USD per year

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About this opportunity

Original employer description

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Job Description:

We are seeking a Digital Mixed-Signal Lead with a strong digital design and architecture background to lead the development of digital control infrastructures for advanced clocking sub-systems (PLLs, FLLs, and DLLs).

Core Responsibilities

Architecture & RTL: Own the architectural definition, RTL implementation, and system-level integration of the digital logic driving clocking IPs.
Logic Design: Design complex digital control loops, state machines for adaptive calibration, DVFS (dynamic voltage/frequency scaling) controllers, and fractional-N delta-sigma modulators.
Analog Interface: Serve as the primary bridge to Analog Circuit Designers. Translate analog specifications into robust digital architectures and define clean boundaries at the analog-digital interface.
Verification Partnership: Partner with Verification Teams to drive Mixed-Signal Verification (MSV) and Real Number Modeling (RNM) strategies for high-coverage loop simulations.
Physical Design Collaboration: Work with Physical Design Teams to co-optimize floorplanning and protect sensitive analog nodes from digital switching noise.
Sign-off Methodology: Enforce a rigorous full-chip CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing) sign-off methodology for the clocking network.

Candidate Requirements

Education: Bachelors degree
Experience: 8+ years of professional digital ASIC design experience.
RTL Mastery: Deep expertise in writing robust, synthesizable SystemVerilog RTL
Process Nodes: Direct experience with advanced technology nodes, specifically N5, N3P, and beyond.
Track Record: Proven history of steering cross-functional execution from initial concept through to successful tapeouts.

Compensation and Benefits

The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Why this result? · Employer labels

Full time
R&D
Regular

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.