321 matching jobs

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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Broadcom

Principal Die-to-Die Interconnect Modeling Architect

San Jose, California, United States +1 location

Full time
Regular

Pay posted by employer$167,500–$268,000 USD per year

Added Oct 9, 2026

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Broadcom

Systems Engineering Analog IC Validation

Colorado Springs, Colorado, United States +1 location

Full time
Regular

Pay posted by employer$101,000–$162,000 USD per year

Added Oct 9, 2026

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Broadcom

Senior DFT engineer

Singapore-Yishun

Full time
Regular

Added Oct 9, 2026

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Broadcom

Automic Principal Support Engineer (ICB5)

Plano, Texas, United States +1 location

Full time
Regular

Pay posted by employer$110,800–$177,300 USD per year

Added Oct 8, 2026

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Broadcom

Signal Integrity Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Added Oct 8, 2026

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Broadcom

Spice Modeling Engineer

Irvine, California, United States

Full time
Regular

Pay posted by employer$129,400–$207,000 USD per year

Added Oct 8, 2026

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Broadcom

CAD Engineer

Singapore-Yishun

Full time
Regular

Added Oct 8, 2026

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Broadcom

Technical Trainer / Certified Instructor (VCI) – VMware Cloud Foundation (VCF)

California, United States +2 locations

Full time
Regular

Pay posted by employer$123,100–$197,000 USD per year

Added Oct 7, 2026

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Broadcom

Memory System Designer and Place and Route Engineer

Austin, Texas, United States +1 location

Full time
Regular

Pay posted by employer$109,700–$175,500 USD per year

Added Oct 7, 2026

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Broadcom

Memory System Designer and Place and Route Engineer

USA-Mendota Heights-Northland

Full time
Regular

Pay posted by employer$129,400–$207,000 USD per year

Added Oct 7, 2026

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Broadcom

Principle Product Line Manager, Outbound Marketing – Ethernet Switches

San Jose, California, United States

Full time
Regular

Pay posted by employer$137,500–$220,000 USD per year

Added Oct 7, 2026

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Broadcom

Engineering Program Manager

Duluth, Georgia, United States +2 locations

Full time
Regular

Pay posted by employer$109,700–$175,500 USD per year

Added Oct 7, 2026

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Broadcom

Chemical Mechanical Planarization (CMP) Process Engineer

Fort Collins, Colorado, United States

Full time
Regular

Pay posted by employer$91,100–$146,000 USD per year

Added Oct 6, 2026

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Broadcom

Senior Manager, International Tax

California, United States

Full time
Regular

Pay posted by employer$146,900–$235,000 USD per year

Added Oct 6, 2026

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Broadcom

Manufacturing Operator 1

Fort Collins, Colorado, United States 3 postings

Full time
Regular

Pay posted by employer$20.50–$22.00 per hour

Added Oct 6, 2026

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Broadcom

Forward Deployed Engineer (Principal)

Utah, United States +5 locations

Full time
Regular

Pay posted by employer$132,200–$211,500 USD per year

Added Oct 6, 2026

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Broadcom

AI Systems Performance Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Added Oct 5, 2026

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Broadcom

Principal AI Development Engineer

San Jose, California, United States

Full time
Regular

Added Oct 5, 2026

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Broadcom

Analog Layout Designer

Irvine, California, United States

Full time
Regular

Pay posted by employer$108,000–$172,800 per year

Added Oct 5, 2026

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Broadcom

Hardware Engineer

Irvine, California, United States

Full time
Regular

Pay posted by employer$108,000–$172,800 per year

Added Oct 5, 2026

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Broadcom

Senior DFT engineer

Singapore-Yishun

Full time
Regular

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Qualifications · employer excerpt

Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or related field.
Minimum 3 years of experience in DFT design and verification (5+ years preferred for senior roles).
Strong understanding of scan-based test architectures, test compression, and hierarchical DFT implementation.
Hands-on experience with DFT tools such as Siemens Tessent.
Proficiency in ATPG generation, fault coverage analysis, and gate-level DFT verification.

2 more in the full description below.

About this opportunity

Original employer description

Please Note:

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Job Description:

We are seeking a highly motivated Design-for-Test (DFT) Engineer to join our SoC/ASIC DFT development team. The successful candidate will be responsible for implementing and verifying DFT solutions across complex hierarchical designs. This position involves hands-on work in DFT insertion, and comprehensive DFT verification to ensure first-pass silicon success. You will collaborate closely with Physical design team, ATE test teams to develop efficient, high-quality test strategies aligned with industry standards.

Key Responsibilities

a) Develop and implement DFT architectures for hierarchical SoC and ASIC designs, including both block-level and top-level DFT integration.

b) Perform scan insertion, test point insertion, and test compression using SSN or equivalent compression architectures.

c) Validate Serial Stream Network (SSN) topology, managing scan chain balancing, clock domain crossings.

d) Integrate Boundary scan (IEEE 1149.x) and other test access mechanisms for chip-level testability.

e) Generate and analyze ATPG patterns for stuck-at, transition, and path delay faults to ensure optimal test coverage.

f) Perform DFT verification, including verilog / gate level simulation

g) Work closely with cross-functional teams to resolve DFT/testing timing challenges.

i) Collaborate with ATE engineers to prepare and validate timing and pattern files (STIL/WGL) for tester compatibility and production readiness.

j) Support silicon bring-up, production test debugging through Diagnostics and failure analysis.

Qualifications

Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or related field.
Minimum 3 years of experience in DFT design and verification (5+ years preferred for senior roles).
Strong understanding of scan-based test architectures, test compression, and hierarchical DFT implementation.
Hands-on experience with DFT tools such as Siemens Tessent.
Proficiency in ATPG generation, fault coverage analysis, and gate-level DFT verification.
Familiarity with ATE test flows and pattern validation on platforms such as Advantest or Teradyne.
Strong scripting skills in TCL, Perl, or Python for DFT automation.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Why this result? · Employer labels

Full time
R&D
Regular

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.