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Yishun New Town, Singapore
Role Overview Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design …
IND-Pune EON Kharadi Infrastructure
Role Overview As a Lead Physical Design Engineer, you will drive physical design implementation for complex SoC architectures on 5nm and advanced …
Chandler, Arizona, United States
Pay posted by employer$109,700–$175,500 USD per year
Role Overview Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design …
Fort Collins, Colorado, United States
Pay posted by employer$129,400–$207,000 USD per year
Broadcom’s ASIC Products Division is seeking a Design Automation Software Development Engineer. They will define, develop, deploy and support the methodology, …
Bengaluru, India
… knowledge. Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules). Strong layout knowledge in advanced submicron FinFET processes, including …
Yishun New Town, Singapore
We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the …
Yishun New Town, Singapore
We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 per year
We are seeking a hands-on Principal Digital Design Engineer to serve as the Chip Lead for our next-generation silicon projects. In this high-impact role, you …
Colorado Springs, Colorado, United States +1 location
Pay posted by employer$101,000–$162,000 USD per year
Broadcom is searching for a Digital IC Design Engineer to join the Data Center Solutions Group. This position involves working with the latest …
Colorado Springs, Colorado, United States +1 location
Broadcom is searching for a Digital IC Design Engineer to join the Data Center Solutions Group. This position involves working with the latest …
Fort Collins, Colorado, United States +1 location
Pay posted by employer$121,900–$195,000 USD per year
… SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical …
San Jose, California, United States
Pay posted by employer$108,000–$172,800 per year
Engineer will be responsible for verification of complex switch designs. Responsibilities will include creating …
Bengaluru, India
We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the …
San Jose, California, United States
Pay posted by employer$120,000–$192,000 per year
… network switches for enterprise and mega scale data centers . We are looking for experienced engineers to design cutting edge CoWos 2.5D , 3D interposer designs. You will be working on designing interposers starting …
USA-Mendota Heights-Northland
Pay posted by employer$109,700–$175,500 USD per year
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central …
USA-Mendota Heights-Northland +2 locations
Pay posted by employer$109,700–$175,500 USD per year
… individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art SoC development to meet customer requirements for AI and storage …
Irvine, California, United States +1 location
Pay posted by employer$121,900–$195,000 USD per year
This position is responsible for, but not limited to, the following job duties: Work as part of a physical design team implementing chips from netlist to GDSii with a good understanding of the technology elements and the …
Bengaluru, India
Analyze different memory architectures and highlight the tradeoffs Design and build memory or circuit blocks at the gate or transistor level Simulate and analyze the circuit design …
Irvine, California, United States +1 location
This opening work on chip design which enables 10Gbps/40Gbps/100Gbps/400Gbps backplane/cable/optical fiber communication architect block …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, creating comprehensive test …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
