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Intel

PERC Rule Deck Development Engineer

Bengaluru, Karnataka, India

Added Oct 27, 2026

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Intel

EDA Tools Software Engineer

Hillsboro, Oregon, United States

Pay posted by employer$128,880–$245,160 USD per year

Added Oct 27, 2026

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Intel

Facilities Mechanical Engineer

Malaysia, Penang

Added Oct 27, 2026

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Intel

Calibration Lab Engineer

Ho Chi Minh City, Ho Chi Minh City (HCMC), Vietnam

Added Oct 27, 2026

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Intel

Transistor Reliability and Quality Engineer

Hillsboro, Oregon, United States

Pay posted by employer$155,520–$219,550 USD per year

Added Oct 27, 2026

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Intel

Software Development Engineer - Intel Contract Employee

Hillsboro, Oregon, United States +2 locations

Pay posted by employer$52,000–$200,000 per year

Added Oct 27, 2026

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Intel

Intel Foundry Strategic Marketing

Santa Clara, California, United States +2 locations

Pay posted by employer$175,620–$247,930 USD per year

Added Oct 27, 2026

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Intel

Lead Humanoid Robotics System Architect

Hillsboro, Oregon, United States +3 locations

Pay posted by employer$220,920–$361,480 USD per year

Added Oct 27, 2026

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Intel

CPU Circuit Design Engineer

Austin, Texas, United States

Pay posted by employer$141,910–$269,100 USD per year

Added Oct 27, 2026

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Intel

DFT Design Engineer

Bengaluru, Karnataka, India

Added Oct 27, 2026

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Intel

Principal Engineer, AI Applied Research

Hillsboro, Oregon, United States

Pay posted by employer$255,850–$361,200 USD per year

Added Oct 27, 2026

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Intel

Design Automation Engineer - Neuromorphic Computing

Hillsboro, Oregon, United States +4 locations

Pay posted by employer$122,440–$232,190 USD per year

Added Oct 27, 2026

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Intel

Product Development/DFX Lead - Neuromorphic Computing

Hillsboro, Oregon, United States +4 locations

Pay posted by employer$141,910–$269,100 USD per year

Added Oct 27, 2026

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Intel

LVS Runset Development Engineer

Bengaluru, Karnataka, India

Added Oct 27, 2026

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Intel

Facilities Instrumentation and Controls Engineer

Malaysia, Penang

Added Oct 27, 2026

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Intel

Wireless Connectivity System and Architecture Engineer

Petaẖ Tiqva, Central District, Israel +1 location

Added Oct 27, 2026

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Intel

Software Engineering - Intern, Graduate

Hillsboro, Oregon, United States +4 locations

Pay posted by employer$111,098–$111,102 USD per year

Added Oct 27, 2026

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Intel

Software Engineering - Intern, Bachelor’s

Hillsboro, Oregon, United States +4 locations

Pay posted by employer$95,698–$95,702 USD per year

Added Oct 27, 2026

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Intel

Silicon Hardware Engineering - Intern, Graduate

Hillsboro, Oregon, United States +4 locations

Pay posted by employer$105,698–$105,702 USD per year

Added Oct 27, 2026

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Intel

Silicon Hardware Engineering - Intern, Bachelor’s

Hillsboro, Oregon, United States +4 locations

Pay posted by employer$91,198–$91,202 USD per year

Added Oct 27, 2026

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Intel

PERC Rule Deck Development Engineer

Bengaluru, Karnataka, India

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About this opportunity

Original employer description

Job Details:

Job Description:

We are looking for a PERC Runset Development Engineer to develop and Validate PERC (Programmable Electrical Rule Checker) rule decks. The role involves working closely with PDK Team and foundry to implement PERC and ensure design compliance. Key Responsibilities: • Rule Development: Develop, validate, and maintain complex PERC rule decks to identify electrical reliability violations (e.g., ESD paths, current density, voltage stress, and floating gates). • Multi-Tool Integration: Develop and optimize verification flows across multiple EDA environments, ensuring consistency in results between Calibre PERC( preferred), Cadence Pegasus, and Synopsys tools. • Cross-Functional Collaboration: Work closely with Device Physicists, Process Integration Engineers, and Analog Designers to translate reliability requirements into programmable rules. • Debug and Analysis: Provide expert-level support to design teams in debugging PERC violations, distinguishing between true reliability risks and tool-induced false positives. • Automation: Develop scripts (Python, SKILL, Tcl, or Perl) to automate the execution, reporting, and tracking of reliability checks across different design versions. • Documentation: Maintain detailed documentation of reliability check-sets and create guidelines for designers to implement correct-by-construction layouts.

Qualifications:

Required Skills: • Experience with PERC rule development (preferably using Calibre PERC). • Knowledge of ESD, latch-up and reliability verification. • Familiarity with SVRF, TVF, Python or Tcl scripting. • Strong debugging and problem-solving skills. • Knowledge of Linux and scripting (Python/Shell/Tcl) is desirable. • Experience with advanced technology nodes is an advantage. • Team player and be able to work with global teams. Preferred Qualifications: • Bachelor's degree with 10+ years of experience, OR • Master's degree with 8+ years of experience, OR • PhD degree with 2+ years of experience in Electrical Engineering, Computer Engineering, Electronics or related field; semiconductor industry experience. • Basic AI experience is an added skill.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.