291 matching jobs for “Staff Design Verification Engineer”

How results work

Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Analog Devices

Staff Design Verification Engineer

Bengaluru, Karnataka, India 3 postings

As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing verification strategies for our most …

Added Nov 3, 2026

Save job

Analog Devices

Staff Design Verification Engineer

CLOSED-India, Bangalore, Aveda Meta

As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing verification strategies for our most …

Added Nov 3, 2026

Save job

Analog Devices

Staff Design Verification Engineer

United Kingdom, Edinburgh, SC, Freer

… today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X . Staff Design Verification Engineer The Data Center and Energy team at Analog Devices is seeking STAFF DESIGN VERIFICATION ENGINEER. The …

Added Nov 3, 2026

Save job

Analog Devices

Staff Design Verification Engineer

Bengaluru, Karnataka, India

Key member of design verification team for SOC or subsystem design pre silicon verification. The candidate will be responsible …

Added Nov 3, 2026

Save job

Analog Devices

Staff Design verification Engineer

Bengaluru, Karnataka, India

As a Staff Digital Design Engineer, you will lead complex digital design projects and provide technical leadership for …

Added Nov 3, 2026

Save job

Analog Devices

Staff Engineer, Design Verification Engineering

Bengaluru, Karnataka, India

As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing verification strategies for our most …

Added Nov 3, 2026

Save job

GE Aerospace

Staff Engineer - FPGA Design/Verification

Grand Rapids, Michigan, United States +2 locations

Full time
Regular

Summary GE Aerospace is seeking an experienced Staff Engineer – FPGA Design/Verification to lead the development of custom logic for advanced avionics hardware. …

Added Oct 27, 2026

Save job

Analog Devices

Staff Engineer, Design Verification Engineering

Chandler, Arizona, United States

Pay posted by employer$172,390–$199,229 per year

… Learn more at www.analog.com and on LinkedIn and Twitter (X) . Employer: Analog Devices, Inc. Job Title: Staff Engineer, Design Verification Engineering Job Requisition: 1010.1197.6 / R262387 Job Location: Chandler, …

Added Nov 3, 2026

Save job

Analog Devices

Staff Design Verification Engineer – SoC and eFPGA

Austin, Texas, United States

… with architecture, RTL, firmware, and software teams to understand new features and define comprehensive verification strategies. Develop detailed verification plans covering feature interactions, system-level behavior, and …

Added Nov 3, 2026

Save job

Analog Devices

Staff Physical Verification Engineer

Bengaluru, Karnataka, India

- Own full-chip and block-level physical verification signoff, including DRC, LVS, ERC, PERC and antenna/ESD checks for multiple complex SoCs. - Drive tape-out …

Added Nov 3, 2026

Save job

Broadcom

Staff IC Verification Engineer

Fort Collins, Colorado, United States +1 location

Full time
Regular

Pay posted by employer$109,700–$175,500 USD per year

… individuals to work in SoC and IP development programs. The candidate will be joining a high-performance design team responsible for state-of-the-art subsystem development to meet customer requirements for AI and …

Added Nov 3, 2026

Save job

Micron Technology

Staff Design Engineer

San Jose, California, United States

Pay posted by employer$145,000–$246,000 per year

… deliver required functionalities Participate in the conception and development of new circuits Define and design composition architecture specifications for new features. Support the creation of schematics and/or RTL …

Added Nov 3, 2026

Save job

Arrow Electronics

Design Verification Engineer (eInfochips Inc)

US-CA-San Jose, California

Full time
Regular

… with C knowledge Regression & Coverage Closure What We Are Looking For: Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to …

Added Oct 27, 2026

Save job

Arrow Electronics

Design Verification Engineer(eInfochips Inc)

US-CA-San Jose, California

Full time
Regular

Pay posted by employer$95,900–$149,600

… CPU ARM/RISC-V with C knowledge Regression & Coverage Closure What We Are Looking For: Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / …

Added Oct 27, 2026

Save job

Broadcom

Staff Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

… position requires a breadth of disciplines and responsibilities in supporting the Processor based subsystem verification for the ‘ASIC Products Division’ within Broadcom Limited. Responsibilities will include Verification …

Added Oct 5, 2026

Save job

Broadcom

Staff Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, partitioning, placement, …

Added Oct 5, 2026

Save job

Analog Devices

Staff Physical Design Engineer

Bengaluru, Karnataka, India

… 16nm, 7nm, 5nm, 4nm). Drive timing closure, congestion resolution, IR/EM, signal integrity, and physical verification (DRC/LVS/antenna) to meet PPA and quality targets. Define and refine hierarchical PNR strategies, IO …

Added Nov 3, 2026

Save job

Analog Devices

Staff Physical Design Engineer

CLOSED-India, Bangalore, Aveda Meta

Added Nov 3, 2026

Save job

Intel

Staff Logic Design Engineer

Malaysia, Penang 2 postings

… motivated engineering talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build …

Added Oct 27, 2026

Save job

Thermo Fisher Scientific

Staff Engineer, Systems Design

Singapore, Singapore

… environment, making sure our food is safe or helping find cures for cancer. DESCRIPTION: Join our team as a Staff Engineer, Systems Design at Thermo Fisher Scientific, where you'll contribute to innovation in scientific …

Added Oct 16, 2026

Save job

Analog Devices

Staff Design Verification Engineer

CLOSED-India, Bangalore, Aveda Meta

View job

Save job

About this opportunity

Original employer description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

Staff Design Verification Engineer

About the Role
As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing verification strategies for our most complex analog and mixed-signal designs. You'll architect sophisticated verification environments, mentor junior engineers, and collaborate across organizational boundaries to ensure product quality and reliability.
Working with limited direction, you'll apply your deep technical expertise to solve critical verification challenges while representing ADI in interactions with key customers and industry partners. This senior position involves significant influence on verification methodology adoption and technical decisions that impact crucial organizational objectives.

Key Responsibilities

Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key contributor in critical verification environments
Verification Architecture: Design and implement sophisticated UVM-based verification environments that ensure comprehensive test coverage and design quality
Technical Mentorship: Guide and develop junior engineers, serving as a resource for colleagues with less experience while modeling professional behaviors
Cross-Functional Direction: Coordinate work across organizational lines, collaborating with design teams on verification requirements and sign-off criteria
Problem Resolution: Lead complex debugging efforts across RTL and gate-level simulations with minimal direction, developing resolutions that require in-depth analysis
Coverage Closure: Drive functional and code coverage closure using advanced verification methodologies to ensure design accuracy
Post-Silicon Support: Lead post-silicon validation activities, contributing expertise to address critical issues
Customer Representation: Serve as principal customer contact on projects, representing ADI's technical excellence and customer commitment

Must Have Skills

SystemVerilog and UVM Expertise: Expert-level knowledge of SystemVerilog and Universal Verification Methodology for architecting advanced verification environments for complex designs
Test Planning and Strategy: Demonstrated ability to develop comprehensive verification plans that drive coverage-driven methodologies and verification closure
Mixed-Signal Verification: Deep understanding of mixed-signal design principles and verification methodologies, with experience implementing sophisticated verification approaches
Debugging Mastery: Advanced debugging skills across multiple design abstractions, with proven ability to resolve complex verification issues with minimal direction
EDA Tool Proficiency: Extensive experience with electronic design automation tools (Cadence/Synopsys) and formal verification techniques
Scripting and Automation: Advanced proficiency in Python, Perl, TCL, or Shell scripting for creating sophisticated verification automation frameworks
Technical Leadership: Demonstrated ability to influence verification direction, mentor junior engineers, and drive methodology adoption across teams

Preferred Education and Experience

MS/PhD in Electrical Engineering, Computer Engineering, or related field
7-10+ years of relevant digital design verification experience, with particular emphasis on mixed-signal verification

Why You'll Love Working Here
At Analog Devices, you'll be part of a collaborative and innovative team that's shaping the future of technology. We offer a supportive environment focused on professional growth, competitive compensation and benefits, work-life balance, and the opportunity to work on cutting-edge projects that make a real impact on the world.
Your expertise will shape the future of technology, and you'll be supported by a culture that values continuous advancement and professional growth. Join us and help create the technologies that bridge the physical and digital worlds, making a tangible difference in how people live, work, and connect.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days

Why this result? · Employer labels

Exact title match

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.