1,000+ matching jobs for “Design Verification Engineer”

How results work

Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Nvidia

Senior Chip Design Verification Engineer

Israel, Tel Aviv +1 location

NVIDIA is looking for best-in-class Chip Verification Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best …

Added Oct 27, 2026

Save job

Analog Devices

Principal Engineer, Design Verification Engineering

Bengaluru, Karnataka, India

Lead design verification team for SOC or subsystem design pre silicon verification. The candidate will be responsible …

Added Nov 3, 2026

Save job

Analog Devices

Principal Engineer, Design Verification Engineering

Bengaluru, Karnataka, India

Lead design verification team for SOC or subsystem design pre silicon verification. The candidate will be responsible …

Added Nov 3, 2026

Save job

Marvell Technology

Digital IC Design/Verification Engineer

Córdoba, Cordoba, Argentina

Full time
Regular

among RTL design/coding, C/C++ verification, implementing automated test cases, building, and maintaining regressions …

Added Nov 3, 2026

Save job

Arrow Electronics

Design Verification Engineer (eInfochips Inc)

US-CA-San Jose, California

Full time
Regular

… with C knowledge Regression & Coverage Closure What We Are Looking For: Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to …

Added Oct 27, 2026

Save job

Micron Technology

Principal Design Verification Quality Engineer

Boise, ID - Main Site

Verification Quality and Methodology Governance Define and drive DRAM verification methodology, quality standards, and …

Added Nov 3, 2026

Save job

Cisco Systems

Senior ASIC Design Verification Engineer

San Jose, California, United States

Pay posted by employer$167,700–$245,200

… experiment more, and work quickly. Join us to power the future of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You will define, …

Added Oct 27, 2026

Save job

Arrow Electronics

Design Verification Engineer(eInfochips Inc)

US-CA-San Jose, California

Full time
Regular

Pay posted by employer$95,900–$149,600

… CPU ARM/RISC-V with C knowledge Regression & Coverage Closure What We Are Looking For: Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / …

Added Oct 27, 2026

Save job

Intel

Mixed Signal Design Verification Engineer

Hillsboro, Oregon, United States +1 location

Full time
Regular

Pay posted by employer$122,440–$200,340 USD per year

… innovation, dedicated to creating products that transform industries and improve lives worldwide. We design and manufacture advanced silicon solutions that power the digital world. Our commitment to excellence …

Added Oct 27, 2026

Save job

Analog Devices

Mixed Signal Design Verification Engineer

Wilmington, Massachusetts, United States

Pay posted by employer$87,188–$119,906

/Duties: Develop analog circuit models and system models that enable efficient and accurate verification of functionality and connectivity within the integrated system. Work closely with design and architecture …

Added Nov 3, 2026

Save job

Analog Devices

Staff Engineer, Design Verification Engineering

Bengaluru, Karnataka, India 2 postings

… : Minimum BTech/BE degree in Electrical/Electronics/Computer science 8+ years of solid digital logic design experience in hands-on and/or technical leadership. Strong technical orientation to lead the activities …

Added Nov 3, 2026

Save job

Micron Technology

MTS, DEG Design Verification

Boise, ID - Main Site

As an MTS Design Verification Engineer, you will serve as a technical leader driving innovation in DRAM verification for advanced memory products. …

Added Nov 3, 2026

Save job

Nvidia

Senior Digital Design Verification Engineer - Hardware

Santa Clara, California, United States

We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the …

Added Oct 31, 2026

Save job

Nvidia

Senior ASIC Design Verification Engineer - LPU

Canada, Remote

… join the team and see how you can make a lasting impact on the world. NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s leading inference accelerator. This …

Added Oct 31, 2026

Save job

Cisco Systems

Design Verification Technical Leader

Carlsbad, California, United States +1 location

Pay posted by employer$192,400–$275,800

… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …

Added Oct 27, 2026

Save job

Nvidia

Senior ASIC Design Verification Engineer - LPU

Santa Clara, California, United States +5 locations

Added Oct 27, 2026

Save job

GE Aerospace

Entry Level - FPGA Design/Verification Engineer

Grand Rapids, Michigan, United States

Summary Collaborate with a team of hardware and systems engineers to design, verify, and integrate FPGAs for avionics hardware. As an Entry Level FPGA Design/Verification Engineer, …

Added Nov 11, 2026

Save job

Intel

Senior Design Verification Engineer - Neuromorphic Computing

Hillsboro, Oregon, United States +4 locations

Full time
Regular

Pay posted by employer$122,440–$232,190 USD per year

… the versatility demanded by modern AI workloads. Position Overview We are seeking experienced pre-silicon verification engineers who are passionate about driving innovation at the intersection of advanced semiconductor …

Added Oct 27, 2026

Save job

Arrow Electronics

Senior Design Verification Engineer (eInfochips Inc)

US-MN-Minnesota (Remote Employees)

Full time
Regular

What You'll Be Doing: Testbenches: Build scalable verification environments using UVM and SystemVerilog. Planning: Create detailed verification plans from architectural …

Added Oct 27, 2026

Save job

Micron Technology

Principal Engineer - Memory Circuit Design Verification

Hyderabad - Phoenix Aquila, India

12+ years in Design Verification (experience with DDR/GDDR/DDR memory Verification is preferred) Define and drive verification …

Added Nov 3, 2026

Save job

Analog Devices

Principal Engineer, Design Verification Engineering

Bengaluru, Karnataka, India

View job

Save job

Requirements · employer excerpt

B.Tech/M.Tech with 12+ years of experience in digital pre-silicon verification, including leadership across IP, subsystem, or SoC-level DV.
Strong understanding of SoC/Subsystem architectures with hands-on expertise in Verilog/SystemVerilog and UVM-based testbench development, debugging, and methodology implementation.
Proven track record in verification closure using functional and code coverage metrics across block, subsystem, and SoC levels.
Expertise in NoC, bus, and interconnect verification, along with coverage analysis and optimization.
Experience in architecting scalable testbench environments and defining robust DV flows and methodologies.

10 more in the full description below.

About this opportunity

Original employer description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

Analog Devices is seeking Digital Design Principal Verification Engineer, who will be responsible for design verification of highly integrated solutions and products in a multifunctional team. You will be working on driving real revenue growth on the next generation of Intelligence at the Edge products across multiple products and business units.

About ADI:

Analog Devices, Inc. is a leading global high-performance analog technology company dedicated to solving our customers' most complex engineering challenges. We play a critical role at the intersection of the physical and digital world by providing the building blocks to sense, measure, interpret, connect, and power devices and systems. We design, manufacture, test, and market a broad portfolio of solutions, including integrated circuits (ICs), software and subsystems that leverage high-performance analog, mixed-signal and digital signal processing technologies. We embrace a culture of innovation and collaboration to push the state of the art.

About the Role

Lead design verification team for SOC or subsystem design pre silicon verification. The candidate will be responsible for formulating verification strategies, Define verification architecture, Flow, Methodology and leading, driving and completing verification of large integrated products. As a senior team member, it is expected that he/she will lead and influence verification methodologies within both DBU and ADI. The candidate is also encouraged to participate in cross company technical initiatives as well as patent and publish work where possible.

Responsibilities

Lead end-to-end SoC verification for complex digital SoCs, driving execution from planning to signoff.
Verify complex microprocessor-based designs, AI/ML accelerators, and high-speed peripherals using advanced verification methodologies.
Define and drive team execution by planning tasks, tracking progress, and providing technical leadership, mentoring, and guidance.
Collaborate closely with architecture and design teams to define requirements and align on verification deliverables and dependencies.
Drive pre-silicon readiness by aligning with emulation, FPGA, and software teams to cover post-silicon validation scenarios early.
Develop and execute end-to-end system-level use cases for comprehensive functional validation.
Architect and implement scalable UVM-based testbenches, DV flows, and methodologies.
Define and review test plans; ensure closure of functional and code coverage across block, subsystem, and SoC levels.
Work cross-functionally with emulation, FPGA, firmware, and system teams to ensure full-system correctness.
Apply formal verification techniques for IP and subsystem-level validation.
Lead NoC/interconnect verification and ensure robust data flow across the SoC.
Perform performance verification and system-level analysis across real-world use cases.
Drive innovation in verification strategies to meet aggressive schedules and quality goals.
Define overall verification strategy based on product requirements and design specifications, leveraging modern techniques such as formal, emulation, portable stimulus, and virtual platforms.

Requirements

B.Tech/M.Tech with 12+ years of experience in digital pre-silicon verification, including leadership across IP, subsystem, or SoC-level DV.
Strong understanding of SoC/Subsystem architectures with hands-on expertise in Verilog/SystemVerilog and UVM-based testbench development, debugging, and methodology implementation.
Proven track record in verification closure using functional and code coverage metrics across block, subsystem, and SoC levels.
Expertise in NoC, bus, and interconnect verification, along with coverage analysis and optimization.
Experience in architecting scalable testbench environments and defining robust DV flows and methodologies.
Strong background in power-aware verification (UPF), including power analysis and optimization.
Hands-on experience with formal verification, including flow definition, connectivity, and functional property checking.
Solid protocol knowledge and verification experience across high-speed and low-speed interfaces such as I2C, SPI, Ethernet, UART, AXI/AHB, DMA, and SVI3.
Experience in security and safety verification, ensuring compliance with secure design and functional safety requirements.
Familiarity with gate-level simulations with timing annotation (GLS).
Strong expertise in test planning, constrained-random verification, assertions, and transaction-level modeling.
Good understanding of processor-based systems (ARM, RISC-V, Tensilica), AI/ML accelerators, and proficiency in C/C++, SystemC, and scripting (Python/TCL/Shell).
Exposure to mixed-signal/analog verification (ADC/DAC/PLL/PHY) is a plus.
Excellent communication and leadership skills with the ability to collaborate across global teams and drive verification innovation.
Strong problem-solving mindset with the ability to quickly learn and adopt new technologies

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days

Why this result? · Employer labels

All keywords in title

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.