Senior Chip Design Verification Engineer · AnywhereEdit
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125 matching jobs for “Senior Chip Design Verification Engineer”

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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Cisco Systems

ASIC DFT Engineer - Acacia (Hybrid)

San Jose, California, United States

Pay posted by employer$155,000–$222,600

… DFT DRC violations, ATPG coverage holes, chain failures, and pattern simulation issues Work with RTL and verification teams to ensure DFT requirements are correctly implemented Support block-level and full-chip DFT …

Added Oct 28, 2026

Applied Materials

Director, Optical Engineering

Santa Clara, California, United States

Pay posted by employer$210,000–$289,000

… and/or develop and execute significantly complex system projects. Oversees and approves designs in team design reviews. Takes active part in the design of complex modules / sub-modules. Approve qualification results of …

Added Oct 27, 2026

Booz Allen Hamilton

Information Assurance Certification Lead

El Segundo, California, United States

Pay posted by employer$99,000–$225,000

… Experience using Micro sof t Office tools Knowledge of Application-Specific Integrated Circuit ( ASIC ) chip design, FPGAs, and integration into ASICs Ability to communicate technical details with internal and …

Added Oct 27, 2026

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.

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