1,000+ matching jobs for “Physical Design Engineer”

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Broadcom

IC Design Engineer

Bengaluru, India 3 postings

Full time
Regular

In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous …

Added Oct 5, 2026

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Broadcom

IC Design Engineer

Bengaluru, India 2 postings

Full time
Regular

In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous …

Added Oct 5, 2026

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Intel

Design Verification Engineer

US, California, Santa Clara

Pay posted by employer$105,650–$149,150 USD per year

About Intel & Silicon Chassis Intel is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to the verification …

Added Oct 27, 2026

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KLA

System Design Engineer

Milpitas, California, United States

Full time
Regular

Pay posted by employer$136,300–$231,700 per year

… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and inspection …

Added Oct 15, 2026

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RTX

Physical Systems Engineer II (Onsite)

Middletown, Rhode Island, United States

of Physical Systems Engineer in our Physical Sciences & Systems (PS2) business unit. This position is for a …

Added Oct 27, 2026

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Intel

Design Verification Engineer

US, California, Santa Clara +1 location

Pay posted by employer$141,910–$200,340 USD per year

Job Description Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of …

Added Oct 27, 2026

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Broadcom

ASIC Design Engineer

Irvine, California, United States +1 location

Full time
Regular

We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, …

Added Oct 5, 2026

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Applied Materials

Senior Design Engineer

Singapore, Singapore

We are seeking an experienced Senior FEA Modeling Engineer to join the Advanced Packaging Modeling team. The engineer will independently lead complex …

Added Oct 27, 2026

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Intel

Logic Design Engineer

Malaysia, Penang

… engineering talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build …

Added Oct 27, 2026

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Bank of America

Cable Design Engineer

Plano, Texas, United States

… and invest heavily in our teammates and their families by offering competitive benefits to support their physical, emotional, and financial well-being. Bank of America believes both in the importance of working together …

Added Oct 27, 2026

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KLA

System Design Engineer

Singapore, Singapore

Full time
Regular

Added Oct 15, 2026

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Broadcom

Package Design Engineer

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$82,500–$132,000 USD per year

Broadcom is seeking an IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and …

Added Oct 5, 2026

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Broadcom

Package Design Engineer

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$101,000–$162,000 USD per year

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and …

Added Oct 5, 2026

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Intel

Analog Design Engineer

India, Bangalore

The Role and Impact As an Analog Circuit Design Engineer, you will play a critical role in designing, developing, and optimizing cutting-edge analog and …

Added Oct 28, 2026

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Intel

Circuit Design Engineer

US, California, Folsom

Pay posted by employer$105,650–$149,150 USD per year

The Role and Impact As a Circuit Design Engineer, you will play a pivotal role in designing and optimizing cutting-edge digital circuits for custom …

Added Oct 27, 2026

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Intel

RTL Design Engineer

US, Texas, Austin +2 locations

Pay posted by employer$91,150–$172,860 USD per year

… for everyone. Want to learn more? Visit our YouTube Channel or the link below. Life at Intel As a CPU Logic Design Engineer, you will play a critical role in shaping Intel's next-generation, high-performance …

Added Oct 28, 2026

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Broadcom

IC Design Engineer

Fort Collins, Colorado, United States

Full time
Regular

Pay posted by employer$61,900–$99,000 USD per year

R&D Design Engineering position available in design and physical implementation of high performance System-On-Chip …

Added Oct 21, 2026

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Thermo Fisher Scientific

Electrical Design Engineer

Adelaide, Australia

… environment, making sure our food is safe or helping find cures for cancer. About the Role: The Electrical Design Engineer develops and maintains electrical, instrumentation and control system designs for the Process …

Added Oct 16, 2026

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Broadcom

Design Engineer - STA

Fort Collins, Colorado, United States

Full time
Regular

Pay posted by employer$129,400–$207,000 USD per year

… or data requires an evaluation of intangibles along with an in-depth understanding of the underlying design/constraints and implementation techniques used. Exercises independent judgment in methods, techniques and …

Added Oct 5, 2026

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GE Aerospace

Hypersonic Design Engineer

Rockledge, Florida, United States +1 location

Full time
Regular

Pay posted by employer$95,000–$159,400

Summary Job Description Collaboration with multidisciplinary set of engineers to design and analyze mechanical components and systems for experimental Hypersonic, aero-thermal test rigs. To …

Added Oct 27, 2026

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Applied Materials

Senior Design Engineer

Singapore, Singapore

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About this opportunity

Original employer description

Who We Are

Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world. The equipment that we create and service is essential to advancing AI and accelerating the commercialization of next-generation semiconductor chips. Join us and push the boundaries of materials science and engineering in a company at the foundation of the electronics industry. The work we do together advances the world’s technology.

What We Offer

Location:

Singapore,SGP

You’ll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible—while learning every day in a supportive leading global company. Visit our Careers website to learn more.

At Applied Materials, we care about the health and wellbeing of our employees. We’re committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits.

About the Role

We are seeking an experienced Senior FEA Modeling Engineer to join the Advanced Packaging Modeling team. The engineer will independently lead complex thermal-mechanical simulation projects that influence package architecture, material selection, process windows, qualification strategy, and reliability risk reduction. This role requires approximately five or more years of relevant industrial experience, strong technical judgment, and the ability to convert ambiguous cross-functional problems into validated modeling plans and actionable engineering recommendations.

Key Responsibilities

· Independently define, develop, validate, and deploy high-fidelity FEA models for advanced semiconductor package technologies.

· Lead thermo-mechanical reliability modeling to predict package performance and failure risks under manufacturing, qualification, and operating conditions, including thermal cycling, process-induced stress, fatigue, creep, delamination, and interfacial failure.

· Lead thermal-mechanical analyses of stress, strain, warpage, delamination risk, thermal cycling, creep, plasticity, viscoelasticity, and interfacial behavior across flip-chip, fan-out, 2.5D/3D IC, chiplet, TSV, HBM, and hybrid-bonded structures.

· Develop thermal and coupled multi-physics models to guide package design, material tradeoffs, process integration, and cooling concepts.

· Translate business and engineering questions into simulation requirements, model hierarchies, validation plans, and decision-ready outputs.

· Plan and execute sensitivity analyses, design-of-experiment studies, optimization, and uncertainty assessments to identify robust design and process windows.

· Correlate models with metrology, material characterization, reliability testing, and failure analysis; calibrate constitutive models and quantify predictive limitations.

· Provide clear recommendations to design, process, reliability, manufacturing, and customer-facing teams, including risk statements and proposed validation actions.

· Own simulation workflows and technical reviews for assigned projects, ensuring model quality, traceability, and timely delivery.

· Mentor junior engineers, establish modeling best practices, and drive automation, standardization, and reuse across the team.

· Support technology roadmaps and evaluate emerging materials, interconnects, processes, and package architectures from a thermo-mechanical reliability perspective.

Required Qualifications

· M.S. or Ph.D. in Mechanical Engineering, Materials Science, Applied Mechanics, Applied Physics, or a related field.

· At least five years of relevant industrial experience in thermal-mechanical FEA, preferably in semiconductor packaging, electronics, or an adjacent high-reliability technology domain.

· Demonstrated proficiency with ANSYS, Abaqus, COMSOL, or an equivalent commercial FEA platform, including nonlinear and temperature-dependent material modeling.

· Strong knowledge of advanced packaging architectures and processes, including die attach, underfill, molding, bumping, bonding, reflow, wafer-level processes, and package assembly.

· Practical understanding of polymers, metals, ceramics, interfaces, and their behavior under thermal and mechanical loading.

· Proven ability to validate models, diagnose numerical and physical issues, and communicate recommendations to both technical and leadership audiences.

· Ability to manage multiple priorities and work effectively across design, process integration, reliability, manufacturing, and external partner teams.

Preferred Qualifications

· Experience with coupled electro-thermal-mechanical, fracture, cohesive-zone, creep, viscoelastic, process-induced stress, or submodeling methodologies.

· Experience with HBM, hybrid bonding, FOWLP, chiplets, BSPDN, co-packaged optics, or other emerging integration technologies.

· Familiarity with JEDEC qualification methods and using simulation to interpret or improve reliability test outcomes.

· Advanced scripting and workflow automation using Python, MATLAB, APDL, TCL, or equivalent tools.

· Experience with optimization, surrogate modeling, uncertainty quantification, or tools such as optiSLang.

Demonstrated technical leadership through mentoring, methodology ownership, patents, publications, customer engagement, or cross-functional project leadership.

Additional Information

Time Type:

Full time

Employee Type:

Assignee / Regular

Travel:

Yes, 10% of the Time

Relocation Eligible:

Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.

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