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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Santa Clara, California, United States
… Science, Computer Engineering, Electrical Engineering or related degree. Exposure to computer architecture, ASIC design, or verification methodology is required. Familiarity with Object Oriented programing and/or …
Melbourne, Florida, United States +1 location
… to join our Avionics Design Quality Assurance (DQA) team. We are looking for an experienced Electrical Engineer who is interested in applying their technical skills and experiences and working together with others to …
Caesarea, Israel
… engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation. We leverage cutting-edge silicon technologies and methodologies to develop the …
Carlsbad, California, United States +1 location
Pay posted by employer$192,400–$275,800
… Your Impact Build the optical backbone of the AI revolution. As our High-Speed Analog/Mixed-Signal Design Engineer, you will directly lead the electrical specifications, custom circuit design, and verification strategies …
Santa Clara, California, United States
Pay posted by employer$256,050–$361,480 USD per year
The Role and Impact As a Design Verification Engineering Manager, you will lead a dynamic team of design verification engineers responsible for Xeon SoC …
Bengaluru, Karnataka, India +1 location
… integration with the testability features coordinated in the RTL. • Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation …
USA - Mountain View, CA
Pay posted by employer$119,850–$162,150
. You will work on leading‑edge ASICs used in space and aerospace systems—driving architecture, verification, tapeout readiness, silicon debug, and cross‑discipline integration with architecture, RTL, verification, …
Bengaluru, Karnataka, India +1 location
… RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification. Responsible for thorough test planning and development of test benches to verify comprehensive …
Bengaluru, Karnataka, India +2 locations
… integration with the testability features coordinated in the RTL. * Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation …
Bengaluru, Karnataka, India +1 location
… being developed in the industry. Your Impact: You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You will work with Front-end RTL …
San Jose, California, United States
Pay posted by employer$233,900–$330,400
… and data centers with a fully unified routing and switching portfolio. We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our …
Bengaluru, Karnataka, India
… workloads, and next-generation data center architectures. We seek an experienced High Speed AMS Design Engineer to drive full-chip electrical specifications and deliver mixed-signal design for Cisco's silicon photonics …
Bengaluru, Karnataka, India
… post-silicon debug, to production qualification. Collaborate with chip architects, design engineers, and verification teams to define, optimize, and standardize DFT strategies across multiple projects. Supervise …
Bengaluru, Karnataka, India +1 location
… developed in the industry. Your Impact : You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You will work with Front-end RTL …
Pune, Maharashtra, India +1 location
… outcomes for 100G, 200G, and 400G optical interconnects. This role involves managing the full ASIC lifecycle, from architectural conception and RTL-based design of CPU subsystems and data path interfaces to …
Pune, Maharashtra, India +1 location
… outcomes for 100G, 200G, and 400G optical interconnects. This role involves managing the full ASIC lifecycle, from architectural conception and RTL-based design of CPU subsystems and data path interfaces to …
Fort Collins, Colorado, United States
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing …
Fort Collins, Colorado, United States 2 postings
Pay posted by employer$61,900–$99,000 USD per year
Be part of the IC design team within Broadcom ASIC Products Division in beautiful Fort Collins, Colorado, where we create CMOS ASIC's for industry leading AI, …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
Principal DFT Engineer Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California, …
Singapore-Yishun
We are seeking a highly motivated Design-for-Test (DFT) Engineer to join our SoC/ASIC DFT development team. The successful candidate will be responsible for implementing …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
