140 matching jobs for “Senior DFT Engineer”

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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Nvidia

ASIC Physical Design Engineer

China, Shanghai

ASIC-PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal …

Added Oct 27, 2026

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Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, …

Added Oct 5, 2026

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Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, …

Added Oct 5, 2026

Save job

Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, …

Added Oct 5, 2026

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Analog Devices

Staff Engineer, Test Engineering

Bengaluru, Karnataka, India

ADI’s Hearable Audio Solutions Business Unit is looking for a Senior engineer in test product development at our Bangalore location. The candidate will become an integral part …

Added Nov 3, 2026

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Boeing

Production Chief Engineer

USA - Smithfield, PA +1 location

Full time
Regular

Pay posted by employer$165,000–$224,250

Production Chief Engineer Company: The Boeing Company The Boeing Company is currently seeking a motivated Production Chief Engineer …

Added Oct 16, 2026

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Nvidia

Senior Hardware Technical Lead, Interconnect Systems

Israel, Yokneam

… alignment, resolving technical roadblocks, and ensuring on-time delivery of world-class products. This is a senior individual contributor role with a strong leadership dimension. The right candidate will bring both deep …

Added Oct 27, 2026

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Nvidia

ASIC Verification Engineer - Clocks

Bengaluru, Karnataka, India

The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is …

Added Oct 27, 2026

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Nvidia

CPU Design Methodology Engineer

Hillsboro, Oregon, United States +3 locations

We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development has greatly increased over the years. …

Added Oct 27, 2026

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Broadcom

NPI Test Development Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$121,900–$195,000 USD per year

We are seeking a highly motivated Senior Test Development Engineer to lead the design and deployment of automated test solutions for RF and …

Added Oct 5, 2026

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Marvell Technology

Staff Test Engineer

Singapore

Full time
Regular

… capabilities of current testing equipment. What You Can Expect • Lead Cutting-Edge ATE Test Solutions: As a Senior Level Test Engineer, you will spearhead the development of ATE test solutions for characterization, …

Added Nov 3, 2026

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Marvell Technology

Principal Test Engineer

Santa Clara, California, United States

Full time
Regular

… learn, and lead. Your Team, Your Impact Marvell is seeking a highly motivated and talented Principal Test Engineer to join our dynamic NPI product engineering team. You will work on cutting-edge technologies, including AI …

Added Nov 3, 2026

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Nvidia

Senior Production Test Validation

Israel, Yokneam

We seek a V&V Engineer with a strong background in validation to join the Interconnect validation team. This position will be part …

Added Oct 27, 2026

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RTX

Principal Engineer - Hardware Design

IN-KA-BENGALURU-NORTHGATE ~ Sy No 2/2 Venkatala Village ~ SY NO 2/2 VENKATALA VILLAGE, Yelahanka Hobli

… best practices, including: Design to Cost (DTC+) Design for Manufacturing (DFM) Design for Test (DFT) • Develop and maintain requirements, traceability, and testability throughout the product lifecycle. • …

Added Oct 27, 2026

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Nvidia

Senior Director, ATE Test Development

Santa Clara, California, United States

NVIDIA is seeking a senior engineering leader to define and scale our ATE development strategy for complex silicon products from new …

Added Oct 27, 2026

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Micron Technology

Principal Design Engineer, HBM

Richardson, Texas, United States

… understanding of: Timing, margining, SI/PI, System-level behavior and silicon correlation Experience with DFT, mBIST, and test-mode debug Proficiency in scripting languages such as Python or Perl and experience …

Added Nov 3, 2026

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RTX

Senior New Product Introduction Manager

Glenrothes, Scotland, United Kingdom

… handover. Design for Excellence (DfX) : Champion Design for Manufacturability (DfM), Testability (DfT), and Cost (DfC) to ensure designs are robust and cost-effective. Risk Mitigation : Manage Manufacturing …

Added Oct 27, 2026

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Intel

Senior Technical Lead - CPU Physical Design

Bengaluru, Karnataka, India

We are seeking a highly experienced and motivated Senior Technical Lead - CPU Physical Design to lead the physical implementation of next-generation CPU IPs from …

Added Oct 27, 2026

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Jabil

Principal Engineer Medium Voltage Electrical

Prince George, VA

… UL requirements where applicable, utility requirements, and customer-specific specifications. Serve as the senior MV electrical engineering representative for customer technical reviews, architecture discussions, issue …

Added Oct 28, 2026

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Marvell Technology

Principal Test Development Engineer (ATE)

Santa Clara, California, United States

Regular

… learn, and lead. Your Team, Your Impact Marvell is seeking a highly motivated and talented Principal Test Engineer to join its dynamic New Product Introduction (NPI) test engineering team. You will work on cutting-edge …

Added Nov 3, 2026

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Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States +2 more

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

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About this opportunity

Original employer description

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Job Description:

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, and packaging? Have you taped out so many chips that you can identify potential design problems hidden in EDA reports, advise design teams on how to fix them, and then publish an application note about avoiding them in future? Do you love technical-deep-dive with engineers and providing an eagle’s eye summary to management? If this is your engineering profile and you are looking for a challenge, then we have one for you.

Broadcom develops critical Infrastructure chips that enable a variety of Customers to produce ASICs in almost all major segments of the Semiconductor industry, including AI. Our ASIC Products Division is looking for a senior engineer to guide customer teams designing challenging chips in areas such as AI, HPC, networking and storage. This is an immensely responsible position, and an opportunity to push the frontiers of technology by working with cross-functional teams inside and outside of Broadcom.

As a valued member of this team, you will be required to do the following:

Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design, test, packaging, fabrication, bring-up and production
Advise customers on best practices in EDA, flows and design methodologies, and by organizing Q&A sessions with Broadcom technology experts
See ahead, plan ahead, work ahead. Proactively assess potential risks to the design quality and project schedule, then work with cross-functional teams to prepare and execute risk mitigation actions
Execute physical design flows to check that incoming customer tape-in netlists meet Broadcom’s stringent tape-out quality standards
Motivate and drive yourself to stay abreast of developments in Broadcom IPs, technology and end user applications
Participate in discussions about your chips with marketing, sales, legal and regulatory compliance teams
Be a consummate team player and assist other teams in need

You must have these proven skills to qualify for this position:

Multiple tape-outs in advanced technology nodes
Analyze PPA tradeoffs involved amongst various library components, and architectures
Knowledgeable in low power design and power management
Hands-on experience in physical design and STA, EDA tools, design flows for physical design, logic simulation, test, and packaging
Programming in TCL, shell and scripting languages

Following skills are nice to have:

Exposure to SERDES communications protocols.
Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design verification, DRC, logic synthesis
Knowledge of DFT methods including scan, memory BIST and repair

Education and Experience Requirements:

Bachelors degree and 12+ years of related experience; or Masters degree and 10+ years of related experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $143,800 - $230,000.

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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Keywords also found in description

Full time
R&D
Regular

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