Senior ASIC Verification Engineer - HSIO
Westford, Massachusetts, United States +1 location
NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O …
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Westford, Massachusetts, United States +1 location
NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O …
Malaysia, Penang
Devices Development Group Malaysia (DDG-MYS) Client SoC Team is seeking highly motivated engineering talent to join Intel’s next-generation Client SoC development …
Bengaluru, Karnataka, India 3 postings
In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous …
Bengaluru, Karnataka, India 2 postings
In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous …
Bengaluru, Karnataka, India
NVIDIA is seeking a highly enthusiastic and motivated Verification Engineer to verify the design and implementation of the next generation of control subsystems for the …
San Jose, California, United States +3 locations
Pay posted by employer$143,800–$230,000 USD per year
Responsibilities Include: Work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, …
US-CA-San Jose, California +1 location
… Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals. Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff …
Santa Clara, California, United States
… (DIP) group at NVIDIA develops IP for every chip designed at NVIDIA. This group works closely with internal SOC design, silicon testing, and productization teams that turn our IP into products that change the world. One …
San Jose, California, United States +3 locations
Pay posted by employer$121,900–$195,000 USD per year
The candidate would be required to work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, …
Malaysia, Penang
As a CPU HVM Functional-Test Verification Engineer, you will be part of the DFT team focusing on validating DFT for manufacturing functional testing …
Bengaluru, Karnataka, India
Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, …
Santa Clara, California, United States +1 location
We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our …
Malaysia, Penang 2 postings
Devices Development Group Malaysia (DDG-MYS) Client SoC Team is seeking highly motivated engineering talent to join Intel’s next-generation Client SoC development …
Bengaluru, Karnataka, India
The Role and Impact As an IP Logic Design Engineer, you will be instrumental in developing and optimizing logic designs for high-performance IP …
IND-Pune EON Kharadi Infrastructure
Role Overview As a Lead Physical Design Engineer, you will drive physical design implementation for complex SoC architectures on 5nm and advanced …
Fort Collins, Colorado, United States
Pay posted by employer$109,700–$175,500 USD per year
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class …
Armenia
… groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical Design …
Hillsboro, Oregon, United States +3 locations
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development has greatly increased over the years. We are now …
Vancouver, Washington, United States
Pay posted by employer$116,150–$182,400 USD per year
Lead functional blocks and/or subsystems of digital ASICs from design to silicon verification. This includes RTL coding, verification, silicon validation, and qualification. …
Santa Clara, California, United States
will include architecture and micro-architecture design, RTL design and synthesis, and logic and timing verification using pioneering CAD tools and semiconductor …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.