1,000+ matching jobs for “Physical Design Engineer”
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Colorado Springs, Colorado, United States +1 location 2 postings
Pay posted by employer $129,400–$207,000 USD per year
Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This position involves working with the latest …
Added Oct 5, 2026
Colorado Springs, Colorado, United States +1 location
Pay posted by employer $121,900–$195,000 USD per year
Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This position involves working with the latest …
Added Oct 5, 2026
Colorado Springs, Colorado, United States +1 location
Pay posted by employer $121,900–$195,000 USD per year
Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, …
Added Oct 5, 2026
Colorado Springs, Colorado, United States +1 location
Pay posted by employer $129,400–$207,000 USD per year
Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, …
Added Oct 5, 2026
IND-Pune EON Kharadi Infrastructure
Job Description In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous …
Added Oct 6, 2026
Fort Collins, Colorado, United States
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class …
Added Oct 5, 2026
Fort Collins, Colorado, United States 2 postings
Pay posted by employer $61,900–$99,000 USD per year
Be part of the IC design team within Broadcom ASIC Products Division in beautiful Fort Collins, Colorado, where we create CMOS …
Added Oct 21, 2026
US - California - Thousand Oaks
… as part of the Amgen team. Join us and transform the lives of patients while transforming your career. Engineer What you will do Let’s do this. Let’s change the world. In this vital role you will be responsible for …
Added Oct 15, 2026
USA - Mountain View, CA
In person Full time Regular
Pay posted by employer $119,850–$162,150
… with architecture, RTL, verification, DFT, and external backend partners. Position Responsibilities: Design and implement DFT architectures and test access mechanisms: TAP/JTAG, IJTAG (IEEE 1687), Boundary Scan …
Added Oct 12, 2026
Colorado Springs, Colorado, United States +1 location 3 postings
IC Design Engineer (ICB4) Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions …
Added Oct 21, 2026
Singapore, Singapore
Design and develop functional blocks and subsystems of digital ASICs from specification through RTL …
Added Oct 12, 2026
Milpitas, California, United States
Pay posted by employer $136,300–$231,700 per year
… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design , KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and inspection …
Added Oct 15, 2026
Bengaluru, India 3 postings
In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous …
Added Oct 5, 2026
Bengaluru, India 2 postings
In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous …
Added Oct 5, 2026
Singapore, Singapore
… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design , KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and inspection …
Added Oct 15, 2026
Irvine, California, United States +1 location
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, …
Added Oct 5, 2026
San Jose, California, United States +1 location
Pay posted by employer $143,800–$230,000 USD per year
We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, …
Added Oct 5, 2026
San Jose, California, United States +2 locations
Pay posted by employer $82,500–$132,000 USD per year
Broadcom is seeking an IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and …
Added Oct 5, 2026
San Jose, California, United States +2 locations
Pay posted by employer $101,000–$162,000 USD per year
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and …
Added Oct 5, 2026
USA - El Segundo, CA
In person Full time Regular
Pay posted by employer $98,600–$133,400
… systems, advancing U.S. leadership in space while amplifying human creativity and intelligence. As a Boeing engineer , you’ll join a diverse, collaborative team solving high‑impact challenges in complex semiconductor design. …
Added Oct 12, 2026
Bengaluru, India
Same role posted 2 times, once per location
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Job Description:
In this role, the Engineer will apply and lead Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous criteria for achieving Right-first time silicon. Candidate should have very good experience in layout activities of block and level. Should be well experienced in floor-planning, partitioning, placement, clock tree synthesis, route and physical verification. Responsibilities include, but not limited to: • Understanding of SoC for top-down/bottom-up physical design integration in 5nm and lower technologies • Must have deep functional knowledge of P&R flows, should be able to catch up quickly on internal flows, adapt. • Implement timing and functional ECO • P&R, Extraction, Physical verification, work towards STA closure • Build automation flows wherever needed/adapt to existing flows for re-use • Must be proficient in any of the Cadence/Synospys/Mentor EDA tools for P&R, PV, STA, ECO
• Needs to be automation savvy with high expertise in one of the programming languages used in the industry • Clearly know requisites for executing his/her job and lead by example • Bring tangible improvement in TAT with better quality Minimum Qualifications: • MSEE/MSCS 3+ years (BSEE/BSCS 5+ years) • A deep understanding of backend digital design flow • Proficient in timing constraints, physical constraints • Proficient in handling EDA tools across floorplan/partition/placement/cts/route stages for SoC TOP. • Proficient with backend EDA tools viz, Genus/Innovus/Quantus/Tempus, DC/Star-RCXT/PT, PrimeRail/Voltus, Redhawk • Proficiency in Tcl and Perl • Excellent analytical skills • Shown ability to collaborate in a multi-functional environment, cross-site or cross-time zone
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
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