606 matching jobs for “IC Design Engineer”

How results work

Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Cisco Systems

IC Package design engineer- 4+ Years

Bengaluru, India

Lead package design tasks, planning and driving schedules from concept through implementation Optimize package pinouts, …

Added Oct 27, 2026

Save job

Broadcom

R&D Engineer IC Design 5

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

… implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams. The ideal candidate will have a proven track record of completing …

Added Oct 5, 2026

Save job

Broadcom

R&D Engineer IC Design 4

San Jose, California, United States +1 location 2 postings

Full time
Regular

Pay posted by employer$121,900–$195,000 USD per year

You will be responsible for the front end design and verification of design blocks for these cores. Specific duties will include, but are not limited to …

Added Oct 5, 2026

Save job

Nvidia

IC Test Engineer

Israel, Yokneam

… quality Network products that will change the world, we want to hear from you! What you'll be doing: IC Test definition & development (including test/HW debug) Designing and improving factory test plans (to …

Added Oct 27, 2026

Save job

Broadcom

IC Layout Engineer

Yishun New Town, Singapore

Full time
Regular

… I/O pads, and Mixed-Signal IP in advanced processes within project schedules. Key Responsibilities Layout Design & Execution: Apply design guidelines and advanced process rules to deliver high-performance, robust …

Added Oct 5, 2026

Save job

Broadcom

RF IC Design and System Simulation Engineer

Seoul, 11, South Korea

… Job Requirements: MS degree or PhD with a strong focus on RF power amplifier or related RFIC circuit design. Solid understanding of Transceiver architectures and complete RF front-end chains (PA, LNA, Switch, …

Added Oct 26, 2026

Save job

Cisco Systems

Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

San Jose, California, United States

Pay posted by employer$167,700–$245,200

… You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia …

Added Oct 27, 2026

Save job

Broadcom

Senior Digital / Mixed-Signal IC Design or Verification Engineer

USA-Mendota Heights-Northland

Full time
Regular

Pay posted by employer$109,700–$175,500 USD per year

Senior Digital / Mixed-Signal IC Design or Verification Engineer Location: Mendota Heights, MN or Broomfield, CO Job Description Summary …

Added Oct 5, 2026

Save job

Broadcom

IC CAD Engineer

Chandler, Arizona, United States +4 locations

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Broadcom Central Engineering is looking for an engineer to help with the development, installation, and testing of silicon verification decks, primarily Calibre, …

Added Oct 5, 2026

Save job

Broadcom

IC Verification Engineer

San Jose, California, United States 2 postings

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. Driver Verification quality and Efficiency improvements Mandatory Requirements: Bachelor's …

Added Oct 14, 2026

Save job

Broadcom

Senior IC Validation Engineer

Colorado Springs, Colorado, United States

Full time
Regular

Pay posted by employer$91,100–$146,000 USD per year

The primary role of the IC Validation team is validating Broadcom's storage and PCIe switch silicon products to ensure they meet all …

Added Oct 5, 2026

Save job

Broadcom

Senior IC Validation Engineer

Colorado Springs, Colorado, United States 2 postings

Full time
Regular

Pay posted by employer$91,100–$146,000 USD per year

The primary role of the IC Validation team is validating Broadcom's storage and PCIe switch silicon products to ensure they meet all …

Added Oct 5, 2026

Save job

Cisco Systems

Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

San Jose, California, United States

Pay posted by employer$194,600–$285,700

… center, metro, long-haul and ultra-long haul telecommunication networks. Meet the Team We are Mixed-signal IC design group that develops high speed ()25Gb/s), and high accuracy, analog designs for optical …

Added Oct 27, 2026

Save job

Broadcom

IC Verification Engineer

Bengaluru, India

Full time
Regular

… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. · Drive improvements in Verification in terms of quality and efficiency. Requirements: · …

Added Oct 5, 2026

Save job

Broadcom

IC Verification Engineer

Bengaluru, India

Full time
Regular

… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. · Driver Verification quality and Efficiency improvements Mandatory Requirements: · …

Added Oct 19, 2026

Save job

Broadcom

IC Verification Engineer

San Jose, California, United States 2 postings

Full time
Regular

Pay posted by employer$121,900–$195,000 USD per year

… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. Drive improvements in Verification in terms of quality and efficiency. Requirements: …

Added Oct 14, 2026

Save job

Broadcom

IC Verification Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Added Oct 5, 2026

Save job

Chevron

Designs Engineer, IC&E

El Segundo, California, United States

Full time
Regular

Pay posted by employer$120,300–$206,400

Total Number of Openings 1 Chevron is accepting online applications for the position Designs Engineer, IC&E through October 30, 2026 at 11:59 p.m. ( PST ). The El Segundo Refinery Instrumentation, Control, and …

Added Oct 27, 2026

Save job

Cisco Systems

ASIC Engineering Technical Leader- IC Package Design

Bengaluru, India +1 location

Lead package design tasks, planning and driving schedules from concept through implementation Optimize package pinouts, …

Added Oct 27, 2026

Save job

Broadcom

IC R&D Hardware Engineer

Yishun New Town, Singapore

Full time
Regular

Job Description Summary – PCD Validation Engineer An exciting position in the explosive growth area of Data Center Enterprise Storage responsible for …

Added Oct 5, 2026

Save job

Broadcom

R&D Engineer IC Design 5

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

View job

Save job

About this opportunity

Original employer description

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, creating comprehensive test plans, and verifying high-performance network switch ASIC/FPGAs. The role involves hands-on implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams. The ideal candidate will have a proven track record of completing multiple successful ASIC design and verification cycles—from architecting testbenches (networking background preferred) to achieving full verification closure.

Education & Experience

Experience: 8+ years of ASIC design/verification experience, including a complete understanding of Verilog design and hands-on experience with C/C++.
Education: Bachelor's in Engineering
Methodologies & Languages: Strong working knowledge of object-oriented programming (OOP) and modern ASIC verification flows (e.g., UVM/SystemVerilog).
Technical Depth: Complete mastery of Verilog for simulation and familiarity with ASIC design flows for deep sub-micron technologies.
Domain Knowledge: Experience with networking protocols (e.g., Ethernet, PCIe, routing/switching) is a major plus.
Track Record: Must have completed multiple ASIC tape-outs, with at least one project taken from initial concept through full production.
Communication: Fully comfortable with technical and business English across documentation, cross-functional collaboration, and executive communications.

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Why this result? · Employer labels

All keywords in title

Full time
R&D
Regular

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.