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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
San Jose, California, United States
Pay posted by employer$82,500–$132,000 USD per year
Physical Design Engineer (New College Grad) — ASIC Products Division (APD) Location: San Jose, CA Position Type: Full-Time …
Broomfield, Colorado, United States +4 locations
Pay posted by employer$143,800–$230,000 USD per year
Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the design of complex …
San Jose, California, United States +5 locations
Pay posted by employer$186,900–$267,700
… and data centers with a fully unified routing and switching portfolio. We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our …
San Jose, California, United States +10 locations
Pay posted by employer$186,900–$267,700
… and data centers with a fully unified routing and switching portfolio. We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our …
Cedar Rapids, Iowa, United States
… challenges and to meet the demands of a rapidly evolving global market. We are looking for a Senior FPGA Engineer to be involved in the design, implementation, verification, and integration of a wide variety of …
Cedar Rapids, Iowa, United States
Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… challenges and to meet the demands of a rapidly evolving global market. We are looking for a Senior FPGA Engineer to be involved in the design, implementation, verification, and integration of a wide variety of …
Bengaluru, Karnataka, India
Seeking an experienced PCIe design engineer for subsystem and SoC development with below requirements: B.Tech/M.Tech in Electronics/VLSI …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 per year
The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for …
Santa Clara, California, United States +3 locations
NVIDIA is seeking elite ASIC Infrastructure engineers to deliver the tooling and environment that enables DV and RTL Design for the …
US-TX-REMOTE
… Join us and help shape the future of aerospace and defense. We are hiring a Senior Principal Electrical Engineer (P5) for our growing Avionics FPGA/ASIC team. This position is for a highly experienced and motivated …
Singapore-Yishun
Job Description 1. R&D engineer position available in design and physical implementation of high-performance System-On-Chip ASICs. Key …
USA - El Segundo, CA
Pay posted by employer$119,850–$162,150
Define, develop and validate next-generation multi-ASIC architectures incorporating digital signal-processing cores for digital communication subsystems. …
Bengaluru, Karnataka, India
… and implement verification plans and test benches using emulation tools and methodologies. Collaborate with design and validation teams to identify verification requirements and coverage goals. Utilize emulation platforms …
Israel, Yokneam +2 locations
What if your Python automation caught a critical ASIC bug before the physical silicon was even manufactured? At NVIDIA, our simulation platforms make that happen …
Singapore-Yishun
Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and …
US-CA-San Jose, California +1 location
Job Description What candidate will Be Doing: Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals. Work closely with architects, RTL designers, and DFT …
Kyiv, Kyiv City, Ukraine +2 locations
What if your Python automation caught a critical ASIC bug before the physical silicon was even manufactured? At NVIDIA, our simulation platforms make that happen …
Malaysia, Penang
… engineering talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build …
San Jose, California, United States +2 locations
Pay posted by employer$82,500–$132,000 USD per year
Broadcom is seeking an IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
