Senior Mask Design Engineer - Hardware
Santa Clara, California, United States
Are you a Mask Layout Design Engineer? We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and …
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Santa Clara, California, United States
Are you a Mask Layout Design Engineer? We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and …
Bengaluru, Karnataka, India
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Bengaluru, Karnataka, India 4 postings
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Bengaluru, Karnataka, India
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Malaysia, Penang
… talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build world-changing …
Hsinchu City
… and lead. Your Team, Your Impact Built on decades of expertise and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure …
Irvine, California, United States
… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Digital ASIC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the …
Santa Clara, California, United States
… exciting time to join our team! The NVIDIA VLSI team is looking for a Senior Cell Modeling and Verification Engineer with strong experience in hardware design and methodologies to help develop NVIDIA's ground breaking ASIC …
Santa Clara, California, United States
Are you passionate about DGX systems connecting multiple ASIC chips together, FPGA prototyping, and hardware emulation? Are you interested in pushing the boundaries of …
United Kingdom, Edinburgh, SC, Freer +2 locations
… planning, implementation, execution, and release of products to customers. The Design Verification Engineer will collaborate with the wider ADI technical community which affords an opportunity to work with many …
Bengaluru, Karnataka, India +1 location
… or Master’s in Electrical/Electronics Engineering or related discipline. 5+ years of hands-on experience of ASIC/SoC physical design at advance nodes such as 40,28,22,16 etc. Strong proficiency in floorplanning, PNR, …
Bengaluru, Karnataka, India
… latest process node technologies is also part of the work. Join this dynamic team as a Senior System Perf Engineer, and help craft the future of computing in Bengaluru. What you'll be doing: Lead the productization of …
Bengaluru, Karnataka, India
GPU Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation for Media …
Santa Clara, California, United States +1 location
… world. This is our life’s work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone …
San Jose, California, United States +1 location
Pay posted by employer$154,900–$225,300
… technical product documentations and lead reviews. Architect system block diagrams with major Networking ASIC suppliers. Design Networking Switches, review schematics/layout review, bring-up, troubleshooting, design …
Israel, Yokneam
As a Physical Layer Firmware Architecture Engineer at NVIDIA, you will undertake an outstanding role to build the future of computer graphics, AI, and …
Hyderabad, Telangana, India 2 postings
As a Principal Software Engineer, you will be responsible for designing and developing hardware abstraction layer for BRCM switching …
Córdoba, Cordoba, Argentina
… integrating microprocessor cores, memory subsystems, or complex digital IP blocks. Familiarity with ASIC design flows, including synthesis and static timing analysis. Additional Compensation and Benefit Elements …
Osaka, Osaka, Japan
Work Flexibility: Hybrid or Onsite asic purpose of role/Why the job exists: The Transport Product Engineer is responsible for the day to day …
Santa Clara, California, United States +1 location
… adoption by joining NVIDIA's Advanced Technology Group! We are looking for a Full-Chip RTL Integration Engineer to join our dynamic and growing FE-ASIC development team. In this role, you will be responsible for …
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