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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Bengaluru, Karnataka, India
… OSPF, VXLAN, EVPN, QinQ, and multicast Test and verify SAI (Switch Abstraction Interface) integration and ASIC driver behavior Automate functional, regression, scale, and performance test cases using Python and Robot …
Santa Clara, California, United States +1 location
… lead. Your Team, Your Impact Marvell is seeking a highly motivated and experienced Principal Board Product Engineer to lead board-level product engineering activities from prototype through volume production. This role will …
Hsinchu, Taiwan, Taiwan +1 location
… life’s work, to amplify human creativity and intelligence. We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling …
Hanoi, Hanoi, Vietnam
… networking knowledge (IP/MAC address, netmask, etc.). Knowledge of hardware architecture/components (CPU, ASIC, firmware vs OS). Debug/troubleshooting expertise and manufacturing test operations experience. Familiarity …
Hanoi, Hanoi, Vietnam
… networking knowledge (IP/MAC address, netmask, etc.). Knowledge of hardware architecture/components (CPU, ASIC, firmware vs OS). Debug/troubleshooting expertise and manufacturing test operations experience. Familiarity …
Phoenix, Arizona, United States +2 locations
Pay posted by employer$141,910–$269,100 USD per year
… join us and do something wonderful. The Aerospace, Defense, Government (ADG) - The Senior DFT Logic Design Engineer provides technical support to Intel Foundry Services customers on our PDKs, DFT/DFM insertion, ATPG …
Israel, Tel Aviv
NVIDIA is looking for a best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed …
Malaysia, Penang
… • Knowledge of EMI/EMC design techniques and compliance requirements. • Familiarity with FPGA, CPLD, ASIC, and Intel platform architectures. • Experience with DFM, DFT, and reliability methodologies. • Knowledge …
Santa Clara, California, United States +4 locations
NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our GPU Memory Subsystem IP verification Team! At NVIDIA, we have crafted a team of outstanding people …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
… developing Test plans, Functional coverage and pseudo-random testing Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification leading a Core Very …
Laurel, Maryland, United States
Pay posted by employer$131,300–$237,350
… security challenges. About the Opportunity Leidos is seeking an accomplished Principal Hardware Design Engineer to provide technical leadership in the design, development, testing, and reverse engineering of advanced …
Bengaluru, Karnataka, India
… NVIDIA is increasingly known as “the AI computing company.” What you’ll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs. …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… from architecture and design through production and sustainment. The MPD department is seeking an FPGA Engineer II to join our team. In this role, you will leverage advanced technologies to create cutting-edge solutions …
San Jose, California, United States +3 locations
Pay posted by employer$143,800–$230,000 USD per year
… technologies is highly preferred. Hands on experience with timing analysis and place and route tools for ASIC/ SoC Design is a must. Additional Requirements: Good problem solver. Self starter who can work …
Santa Clara, California, United States
Are you a Mask Layout Design Engineer? We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and …
Bengaluru, Karnataka, India
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Bengaluru, Karnataka, India 4 postings
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Bengaluru, Karnataka, India
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Malaysia, Penang 2 postings
… talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build world-changing …
Irvine, California, United States +1 location
… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Digital ASIC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
