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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Armenia
… groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical …
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… more, and work quickly. Join us to power the future of the digital world. Your Impact Develop and maintain ASIC APIs and SDKs in C and C++, delivering clean, scalable updates that support emulation, bring-up, and …
Singapore-Yishun
Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and RF/microwave …
Bengaluru, Karnataka, India
… bring-up speed, and ultimately what the product delivers in the field. We are hiring a Senior Silicon Power Engineer to own power-feature productization on a flagship silicon program. This is not a coordination role, and it …
Bengaluru, Karnataka, India 3 postings
NVIDIA is seeking an elite Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
Bengaluru, Karnataka, India
NVIDIA is seeking an elite Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, …
US-CA-San Jose, California +1 location
Job Description What candidate will Be Doing: Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals. Work closely with architects, RTL designers, and DFT …
Santa Clara, California, United States
… environment where everyone is inspired to do their best work. We are seeking a skilled Senior Verification Engineer to join our Display Team and help verify the world's foremost GPU and SoC display engines! Working …
Caesarea, Israel
DevOps Infrastructure Engineer Cisco Silicon One is seeking a highly motivated and experienced DevOps Infrastructure Engineer to join our …
Santa Clara, California, United States
… reviews of the customer design / platform and provide feedback. Interact with HW designers (board and ASIC) and write Hardware Design guidelines, Application Notes and publish Technical Bulletins. Interface with …
Israel, Yokneam
… passion and dedication to making a difference in the world through their inventions. As a Senior Package Engineer, you will work closely with SI, layout, and ASIC design teams to develop complex, top-of-the-line ASIC …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
Principal Physical Design Engineer, STA — ASIC Products Division (APD) Location: San Jose, CA Position Type: Full-Time Who We Are — Physical …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… and design through production and sustainment. The MPD department is seeking a Senior FPGA Design Engineer to join our team. In this role, you will leverage advanced technologies to create cutting-edge solutions …
Canada, Remote
… work. Join us and discover how you can build a lasting impact on the world! As a Senior Formal Verification Engineer at NVIDIA, you will verify ASICs developed at the forefront using formal verification tools. You will …
Taiwan, Taipei
… that powers our next-generation GPU architectures. We are looking for a distinguished Senior Firmware Engineer to become part of our GPU Firmware Development team. Unlike sustainment or support roles, our team is …
Bengaluru, Karnataka, India
NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s …
San Jose, California, United States 2 postings
Pay posted by employer$143,800–$230,000 USD per year
… developing Test plans, Functional coverage and pseudo-random testing Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification Very proficient in …
San Jose, California, United States
Pay posted by employer$121,900–$195,000 USD per year
The ASIC Product Division at Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for …
San Jose, California, United States +3 locations
Pay posted by employer$121,900–$195,000 USD per year
… fly. Excellent communication skills. Hands on experience with timing analysis and place and route tools for ASIC/ SoC Design is a must. Should have worked on tape out of at least 1-2 ASIC's in 7nm or lower technologies …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
