1,000+ matching jobs for “Physical Design Engineer”

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Analog Devices

Senior Digital Design Engineer

Munich, Bavaria, Germany

As a Senior Digital Design Engineer, you will drive technical strategy and innovation for complex digital systems, including System on …

Added Nov 3, 2026

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Product Design Engineer - HPIQ

San Francisco, California, United States

Full time
Reg Employee

Pay posted by employer$107,400–$155,700

As a Product Design Engineer at HP IQ, you’ll work at the intersection of creativity, engineering, and design to develop …

Added Oct 12, 2026

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Intel

Platform Hardware design Engineer

Bengaluru, Karnataka, India

Full time
Regular

Position Overview: As a Platform Hardware Design Engineer, you will contribute to the end-to-end development of advanced platform hardware, translating …

Added Oct 27, 2026

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Intel

Silicon Packaging Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

Join our team as a Silicon Packaging Design Engineer in the Data Center Group, where you will play a pivotal role in crafting cutting-edge silicon …

Added Oct 27, 2026

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PBF Energy

Engineer, Sr. Process Design

Oregon, Ohio, United States

Full time
Regular

… 1. Project Development: Support the Project Team with project engineering requirements, including process design input, technical reviews, scope definition, and alignment with engineering standards and best practices. …

Added Oct 27, 2026

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Analog Devices

Staff Design Verification Engineer

United Kingdom, Edinburgh, SC, Freer

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and …

Added Nov 3, 2026

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Nvidia

Mask Design Engineer – Hardware

Santa Clara, California, United States +5 locations

… problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions! This position …

Added Oct 27, 2026

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Nvidia

ASIC Design Engineer - Hardware

Austin, Texas, United States

Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP …

Added Oct 27, 2026

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Marvell Technology

Digital IC Design Engineer

Córdoba, Cordoba, Argentina

Full time
Regular

include: · RTL design/coding. · Testbench simulation and verification. · Debug design issues and ensure functional correctness. · …

Added Nov 3, 2026

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Analog Devices

Analog Design Engineer Intern

Wilmington, Massachusetts, United States +2 locations

Pay posted by employer$22–$41

As an Analog Design Engineer Intern at Analog Devices ( ADI ) , you will have the opportunity to work alongside senior …

Added Nov 3, 2026

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Intel

Analog Circuit Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

Role Overview As an Integrated Voltage Regulator (IVR) Design Engineer, you will be responsible for the architecture, design, and implementation of high-performance …

Added Oct 27, 2026

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Analog Devices

Staff Design Evaluation Engineer

Limerick, Munster, Ireland

Added Nov 3, 2026

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Analog Devices

Digital Design Engineer Intern

Durham, North Carolina, United States +1 location

Pay posted by employer$19–$35

As a Digital Design Engineer Intern at Analog Devices (ADI) , you’ll gain practical experience in the design, simulation, and …

Added Nov 3, 2026

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Broadcom

ASIC Design - Floorplan Engineer

Fort Collins, Colorado, United States

Full time
Regular

Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class …

Added Oct 31, 2026

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Broadcom

I/O Design Engineer

Chandler, Arizona, United States

Full time
Regular

Pay posted by employer$109,700–$175,500 USD per year

Role Overview Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design …

Added Oct 5, 2026

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Intel

Quantum Qubit Design Engineer

Hillsboro, Oregon, United States +7 locations

Full time
Regular

Pay posted by employer$141,910–$269,100 USD per year

… approach spans the entire quantum compute stack while harnessing the power of Intel's 18A process and design infrastructure. We are seeking an exceptional Quantum Design Engineer to join our pioneering quantum …

Added Oct 27, 2026

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Intel

EDA Design Automation Engineer

Malaysia, Penang

Full time
Regular

The Role and Impact Join Intel as an EDA Tools Hardware Engineer, where you will play a pivotal role in advancing hardware design tools, flows, and methodologies. In this …

Added Oct 27, 2026

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Hewlett Packard Enterprise

Senior Hardware Design Engineer

Bengaluru, Karnataka, India

Role Summary We are seeking a Senior Hardware Design Engineer to join our Product HW design team , working on advanced networking systems where signal …

Added Nov 3, 2026

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KLA

Sr. Systems Design Engineer

Milpitas, California, United States 2 postings

Full time
Regular

Pay posted by employer$159,500–$271,200 per year

… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and inspection …

Added Oct 15, 2026

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Intel

GPU Logic Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

GPU Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation …

Added Oct 27, 2026

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Broadcom

ASIC Design - Floorplan Engineer

Fort Collins, Colorado, United States

Full time
Regular

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About this opportunity

Original employer description

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Job Description:

Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular, Networking, Computing, and Storage products. This Floorplan Engineer role focuses on chip-level physical architecture and integration for advanced ASICs operating at speeds exceeding 1 GHz, from concept through production. The position provides hands-on experience with the latest 3 nm and smaller process nodes, defining and optimizing the overall die layout, including partitioning, hierarchy, and placement of major functional blocks, memories, and I/O structures for AI, computing, and networking SoCs.

Key Responsibilities

Define and optimize top-level floorplan architecture, including die size estimation, hierarchy definition, and partitioning.
Drive macro placement, power grid design, clock distribution planning, pin placement, and feedthrough optimization.
Collaborate closely with RTL, timing, and packaging teams to balance performance, power, and area (PPA) targets.
Lead top-level timing closure, congestion analysis, and ECO implementation to ensure clean tapeout readiness.
Coordinate with block owners and integration teams for smooth block-level to top-level convergence.
Support cross-functional design integration, providing guidance and technical support to internal and external partners.
Apply a deep understanding of block PnR, timing closure, physical verification, and IR/EM analysis to achieve signoff-quality results.
Contribute to design flow automation and methodology development for advanced process technologies.

Technical Skills / Background

Strong foundation in VLSI design principles and ASIC physical design fundamentals.
In-depth experience with floorplanning, die partitioning, and hierarchical design.
Working knowledge of PLLs, clock networks, power delivery, and timing-critical structures.
Proven ability to drive PPA optimization through innovative layout and planning strategies.

Coding & Tool Proficiency

Strong experience with TCL scripting and Linux environments is required.
Proficiency in Python, Perl, or Ruby is preferred.
Experience with Cadence or equivalent physical design tools is highly desirable.

Collaboration and Leadership

Excellent communication, organizational, and problem-solving skills.
Ability to work effectively with customers and cross-functional teams across global sites and time zones.
Skilled at organizing and presenting large data sets, managing multiple priorities efficiently.
Exercises independent judgment and strong engineering insight in defining methods, techniques, and evaluation criteria.
Provides technical leadership, mentors others, and leads execution of new initiatives.

Education and Experience

BS in Electrical or Computer Engineering with 12+ years of relevant experience, or
MS in Electrical or Computer Engineering with 10+ years of relevant experience.

Compensation and Benefits

The annual base salary range for this position is USD To USD

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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Keywords also found in description

Full time
R&D
Regular

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