Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Pay posted by employer$143,800–$230,000 USD per year
… implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams. The ideal candidate will have a proven track record of completing …
San Jose, California, United States +1 location2 postings
Full time
Regular
Pay posted by employer$121,900–$195,000 USD per year
You will be responsible for the front end design and verification of design blocks for these cores. Specific duties will include, but are not limited to …
… quality Network products that will change the world, we want to hear from you! What you'll be doing: IC Test definition & development (including test/HW debug) Designing and improving factory test plans (to …
… Job Requirements: MS degree or PhD with a strong focus on RF power amplifier or related RFIC circuit design. Solid understanding of Transceiver architectures and complete RF front-end chains (PA, LNA, Switch, …
… You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia …
Pay posted by employer$143,800–$230,000 USD per year
Broadcom Central Engineering is looking for an engineer to help with the development, installation, and testing of silicon verification decks, primarily Calibre, …
Pay posted by employer$143,800–$230,000 USD per year
… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. Driver Verification quality and Efficiency improvements Mandatory Requirements: Bachelor's …
… center, metro, long-haul and ultra-long haul telecommunication networks. Meet the Team We are Mixed-signal IC design group that develops high speed ()25Gb/s), and high accuracy, analog designs for optical …
… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. · Drive improvements in Verification in terms of quality and efficiency. Requirements: · …
… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. · Driver Verification quality and Efficiency improvements Mandatory Requirements: · …
Pay posted by employer$121,900–$195,000 USD per year
… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. Drive improvements in Verification in terms of quality and efficiency. Requirements: …
Pay posted by employer$143,800–$230,000 USD per year
… strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. Driver Verification quality and Efficiency improvements Mandatory Requirements: Bachelor’s …
Total Number of Openings 1 Chevron is accepting online applications for the position Designs Engineer, IC&E through October 30, 2026 at 11:59 p.m. ( PST ). The El Segundo Refinery Instrumentation, Control, and …
Job Description Summary – PCD Validation Engineer An exciting position in the explosive growth area of Data Center Enterprise Storage responsible for …