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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Santa Clara, California, United States
… safety platforms etc. Collaborate with multi-functional teams like system architecture, chip architecture, ASIC design, verification, CAD, VLSI, SW development, and Operations teams to productize new methodologies Help …
Grand Rapids, Michigan, United States +2 locations
Summary GE Aerospace is seeking an experienced Staff Engineer – FPGA Design/Verification to lead the development of custom logic for advanced avionics hardware. This …
Malaysia, Penang
… talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build world-changing …
San Jose, California, United States +2 locations
Pay posted by employer$82,500–$132,000 USD per year
Broadcom is seeking an IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power …
San Jose, California, United States +2 locations
Pay posted by employer$101,000–$162,000 USD per year
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power …
US, CA, Remote +4 locations
… work. Join us and discover how you can build a lasting impact on the world! As a Senior Formal Verification Engineer at NVIDIA, you will verify ASICs developed at the forefront using formal verification tools. You will …
Bengaluru, Karnataka, India
… of digital design fundamentals, including RTL design, Lint/CDC, low power checks, and the full ASIC design flow. Excellent problem-solving skills, with the ability to troubleshoot and resolve complex DFT …
Taipei
… Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Hardware Design Senior Staff Engineer will serve as a key member of the Hardware Design team within the Operations PE/TE organization. This role …
Bengaluru, Karnataka, India
… Engineering or related field. - Typically 8-12 years of experience in physical verification for complex ASIC/SoC designs, including several successful production tape-outs as signoff owner. - Proven experience owning …
Santa Clara, California, United States +2 locations
We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role, you will join a group of hard working …
Santa Clara, California, United States
… of experience in Semiconductor Test Engineering, with Demonstrated Technical Leadership on Complex SoC/ASIC/analog Test Programs Strong Hands-on Experience with Advantest 93000 ATE Platforms and SmarTest-8 Test …
Melbourne, Florida, United States
… market. Join us and help shape the future of aerospace and defense. Collins Aerospace is seeking a FPGA Engineer II for the CNS (Communication, Navigation, Surveillance) Hardware Engineering Group in Melbourne, Florida. …
Santa Clara, California, United States +1 location
… how you can make a lasting impact on the world. We are seeking an innovative Senior STA Signoff Methodology Engineer to help drive sign-off strategies for the world's leading GPUs, CPUs, LPUs and SoCs. This position is a …
Israel, Tel Aviv +1 location
… debug, and the ability to scale best practices across multiple programs. This is a great match for an engineer who wants to combine technical depth with broad project impact. What you’ll be doing: Own physical …
Fort Collins, Colorado, United States
Pay posted by employer$129,400–$207,000 USD per year
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing …
Fort Collins, Colorado, United States
Pay posted by employer$129,400–$207,000 USD per year
… teams spread across geographical time-zones. Technical Skills/ background Strong understanding of VLSI and ASIC physical design Should have basic understanding of PLLs and clock networks Should be familiar with design …
Belgrade, Central Serbia, Serbia
Meet the Team Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major …
US, CA, Remote +5 locations
… value innovation, collaboration, and excellence. Join our outstanding team as a Senior Formal Verification Engineer and be at the forefront of developing modern technology that builds the future. This role offers an …
San Jose, California, United States +4 locations
Pay posted by employer$143,800–$230,000 USD per year
Broadcom is looking for a lead STA/ Synthesis engineer. In this role, you will be contributing to constraint development, constraint validation, synthesis, audits …
Hsinchu, Taiwan, Taiwan +1 location
… experiment more, and work quickly. Join us to power the future of the digital world. Your Impact Hardware Engineer is a key member of the Cisco Purpose Built Switch hardware team. Define and design the next generation …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
