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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
San Jose, California, United States
Pay posted by employer$121,900–$195,000 USD per year
… individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art subsystem development to meet customer requirements. Responsibilities …
Qingzhou, Shandong, China
… • Creating new designs and resolves issues regarding the manufacturing or building sequences. Ensuring design acceptance and manufacturing readiness. • Participating in the adoption of new technologies and processes …
Fort Collins, Colorado, United States
Pay posted by employer$129,400–$207,000 USD per year
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class …
Bengaluru, Karnataka, India
… of providing a quality product that meets the users needs. The discipline that executes a robust process of design, creation, and optimization of systems, consisting of identification and quantification of system …
San Jose, California, United States +3 locations
Pay posted by employer$143,800–$230,000 USD per year
Responsibilities Include: Work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, …
San Jose, California, United States +3 locations
Pay posted by employer$121,900–$195,000 USD per year
The candidate would be required to work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, …
Santa Clara, California, United States
Pay posted by employer$124,000–$171,000
… with limited supervision Define, coordinate, perform and document engineering test reports Develop, design, or modify mechanical engineering layouts, schematics, or drawings/specifications of difficult scope …
Singapore-Yishun
… and responsibilities: Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 400 ~ 800 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies. …
Singapore-Yishun
… and responsibilities: Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies. …
Singapore-Yishun
… and responsibilities: Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies. …
Córdoba, Cordoba, Argentina
… of flexible business models. In this unique role, you’ll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor chips in a …
Hsinchu, Taiwan, Taiwan
… and algorithms to actively assist in resolving the issues. · Is expected to be a key contributor in design reviews and during the engineering / alpha builds and test phases of programs, which includes testing …
Carlsbad, California, United States +1 location
Pay posted by employer$138,100–$198,200
… leadership position in a highly competitive market. Full-Lifecycle Responsibility: Ownership of PIC product design cycle starting from simulation to layout using Cadence Virtuoso to final GDS tapeout to post-Fab …
Bengaluru, Karnataka, India +1 location
… so we can all enjoy living in it. Responsibilities Provide technical leadership to a team, coordinate design-related work packages, and actively support the Platform Manager. Ensure work quality through the review …
Bengaluru, Karnataka, India
Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, partitioning, placement, …
Bengaluru, Karnataka, India
… silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also involve direct interaction with external …
Paterson, New Jersey, United States
Pay posted by employer$85,600–$125,533 per year
… CAD models, subassemblies, and system layouts for new analyzers and dosers derived from existing designs. Design flow diagrams based on customer requirements and engineering specifications Design and integrate …
Milford, Michigan, United States of America
United States-Utah-Roy
Pay posted by employer$72,100–$108,100
… only part of history, they're making history. Northrop Grumman’s Defense Systems sector is seeking a Civil Design Engineer / Principal Civil Design Engineer to join the Sentinel program in Roy, UT. This role may offer a …
San Jose, California, United States
Pay posted by employer$120,000–$192,000 per year
… will satisfy the following requirements: 1) MSEE or BSEE or equivalent, with concentration in digital design and excellent academic standing. Total engineering minimum experience required is typically a BS degree and …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
