Searching jobs…
Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… networking and data infrastructure solutions. Working closely with Product Test Engineering, DFT, and Design Engineering teams, the group develops and executes qualification, reliability, and RMA testing strategies …
Fort Collins, Colorado, United States 2 postings
Pay posted by employer$61,900–$99,000 USD per year
Be part of the IC design team within Broadcom ASIC Products Division in beautiful Fort Collins, Colorado, where we create CMOS …
San Jose, California, United States
Pay posted by employer$121,900–$195,000 USD per year
Job Title: ASIC Emulation & Verification Engineer (Palladium Specialist) Job Summary We are seeking an experienced ASIC …
Santa Clara, California, United States
NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world’s leading GPUs. In this role, you will be doing unit level …
Bengaluru, Karnataka, India
… develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical …
Israel, Haifa
… We are intentional, fast adopters of AI as a working tool, and actively use AI throughout our architecture, design, verification, and development workflows. If you are energized by defining things that have never existed …
Israel, Haifa
… datapath, or compute-heavy IPs for AI/ML Strong familiarity with the broader development cycle, including design, DFT, and bring-up. Job Type: Experienced Hire Shift: Shift 1 (Israel) Primary Location: Israel, Haifa …
Bengaluru, Karnataka, India
… and implement verification plans and test benches using emulation tools and methodologies. Collaborate with design and validation teams to identify verification requirements and coverage goals. Utilize emulation platforms …
Bengaluru, Karnataka, India
… implement verification plans and test benches using Simulation tools and methodologies. Collaborate with design and validation teams to identify verification requirements and coverage goals. Utilize emulation platforms …
San Jose, California, United States
Pay posted by employer$155,000–$222,600
include: Support DFT implementation for ASIC / SoC blocks and subsystems Implement and validate scan insertion, scan compression, OCC, MBIST, boundary …
Westford, Massachusetts, United States +1 location
NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O …
El Segundo, California, United States +1 location
Verification environment architecture and design using SystemVerilog with UVM/UVM-F Creation of written test plan, testcases, code coverage tracking, and …
San Jose, California, United States +1 location
Pay posted by employer$167,700–$245,200
… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …
USA - Mountain View, CA
Pay posted by employer$98,600–$133,400
ASIC/FPGA Design and Verification Engineer – Space Electronics - MTV (Associate, Experienced, or Lead) Company: …
Office - USA - CA - Headquarters
Your Career As a Silicon Validation Engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products …
Bengaluru, Karnataka, India +1 location
… work. Come join the team and see how you can make a lasting impact on the world. We are now looking for ASIC Flow and Integration Engineer to drive design methodology, automation, and integration for our High Speed …
Hyderabad - Phoenix Aquila, India
… SV/UVM monitors to measure performance and improve Verification Environment · Interact with Architecture/Design/Tester teams to identify ASIC test vectors and functional patterns requirement · Develop flows to automate …
San Jose, California, United States
Pay posted by employer$155,000–$222,600
… Develop and maintain relationships with FA service and equipment vendors. Interface with product, test, and design engineering groups to identify and characterize faults on emerging technologies, while providing fault …
Bengaluru, Karnataka, India
Seeking an experienced PCIe Design Engineer to join Broadcom ASIC Product Division to be part of PCIe subsystems and SoC development. …
San Jose, California, United States
Pay posted by employer$82,500–$132,000 USD per year
Physical Design Engineer (New College Grad) — ASIC Products Division (APD) Location: San Jose, CA Position Type: Full-Time …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
