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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Israel, Tel Aviv +1 location
… debug, and the ability to scale best practices across multiple programs. This is a great match for an engineer who wants to combine technical depth with broad project impact. What you’ll be doing: Own physical …
Fort Collins, Colorado, United States
Pay posted by employer$129,400–$207,000 USD per year
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing …
Fort Collins, Colorado, United States
Pay posted by employer$129,400–$207,000 USD per year
… teams spread across geographical time-zones. Technical Skills/ background Strong understanding of VLSI and ASIC physical design Should have basic understanding of PLLs and clock networks Should be familiar with design …
Belgrade, Central Serbia, Serbia
Meet the Team Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major …
US, CA, Remote +5 locations
… value innovation, collaboration, and excellence. Join our outstanding team as a Senior Formal Verification Engineer and be at the forefront of developing modern technology that builds the future. This role offers an …
San Jose, California, United States +4 locations
Pay posted by employer$143,800–$230,000 USD per year
Broadcom is looking for a lead STA/ Synthesis engineer. In this role, you will be contributing to constraint development, constraint validation, synthesis, audits …
Hsinchu, Taiwan, Taiwan +1 location
… experiment more, and work quickly. Join us to power the future of the digital world. Your Impact Hardware Engineer is a key member of the Cisco Purpose Built Switch hardware team. Define and design the next generation …
Warsaw, Mazovia, Poland +1 location
What if your Python automation caught a critical ASIC bug before the physical silicon was even manufactured? At NVIDIA, our simulation platforms make that happen …
San Jose, California, United States
Pay posted by employer$101,000–$162,000 USD per year
As a Hardware Engineer, you will design, develop, and deliver Ultra High-performance electronic products. In addition, you may …
Vancouver, British Columbia, Canada
… PWMVID, SVID Familiarity with secure boot, firmware update mechanisms, and embedded security. Exposure to ASIC/FPGA development environments and simulation tools. Experience with CI/CD pipelines and version control …
San Jose, California, United States
Pay posted by employer$121,900–$195,000 USD per year
Who We Are — Physical Design Team in APD Broadcom’s ASIC Products Division (APD) is the global leader in custom high-performance silicon solutions. We partner with …
Hsinchu, Taiwan, Taiwan +1 location
… analysis on large data sets to drive test and yield optimization. Who You'll Work With We collaborate with ASIC design teams as well as several peer groups in Supply Chain Operations to influence Cisco Silicon One …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
As a Principal Hardware Engineer, you will design, develop, and deliver Mechanical assemblies, including full chassis design for Ultra …
Bengaluru, Karnataka, India +1 location 3 postings
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, …
IND-Pune EON Kharadi Infrastructure
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, …
Bengaluru, Karnataka, India 2 postings
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, …
Bengaluru, Karnataka, India
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, …
China-Shanghai-Zhangjiang Hi Tech
… customers to develop state of the art IC solutions utilizing Broadcom's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and …
US-CA-San Jose, California
… & Coverage Closure What We Are Looking For: Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product …
Petaẖ Tiqva, Central District, Israel
… team's engineers have 10+ years of experience, and we are looking for a highly skilled multidisciplinary engineer with proven experience in electrical and system engineering to lead the hardware design of our next …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
