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Hillsboro, Oregon, United States +5 locations
Pay posted by employer$122,440–$172,860 USD per year
… engineering execution and expanding market opportunities through internal product development and external ASIC design services. Guided by a data-driven approach, CEG drives scalable, impactful solutions across Intel's …
Bengaluru, Karnataka, India
… and see how you can make a lasting impact on the world! What you’ll be doing: Responsible for verifying the ASIC design, architecture and micro-architecture using advanced verification methodologies. Expected to …
San Jose, California, United States
Pay posted by employer$155,000–$222,600
… highly technical group of semiconductor, packaging, and reliability engineers who partner closely with ASIC design, test operations, and global foundry partners. What makes our team exciting is the opportunity to …
USA-Mendota Heights-Northland +2 locations
Pay posted by employer$109,700–$175,500 USD per year
The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for …
Leixlip, Leinster, Ireland
The Role and Impact As a Sr Deep Learning Hardware Verification Engineer, you will play a pivotal role in shaping the future of AI hardware by validating and optimizing …
Hillsboro, Oregon, United States
Pay posted by employer$122,440–$172,860 USD per year
… academic institutions worldwide. We are seeking an exceptional Quantum IC Substrate Package Layout Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for design of …
Santa Clara, California, United States
… hardware design and software teams. Guide product level decisions for the memory subsystem that span ASIC/VLSI/Board/ATE. What we need to see: Masters or higher in Electrical engineering (or equivalent …
Santa Clara, California, United States +1 location
We are now looking for a Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the …
Caesarea, Israel
As a SW Post-Silicon Validation Engineer you will be operating at the critical junction between firmware, device drivers, and silicon validation, …
Bengaluru, Karnataka, India
GPU Senior Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation for Media …
Malaysia, Penang
The Role and Impact As a CPU Design Verification Engineer, you will play a pivotal role in ensuring the functionality and reliability of cutting-edge CPU designs. …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
… meet the intensive infrastructure needs of the AI space with speed and precision. As a Principal Software Engineer, you will be responsible for designing and developing software for Network Operating System(NOS) on a …
Fort Collins, Colorado, United States +1 location
Pay posted by employer$109,700–$175,500 USD per year
The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for …
Armenia
… design team to reach better physical design QoR. Minimum Qualifications 5+ years of industry experience in ASIC digital design. Proficient in Verilog/System Verilog coding. Experience with front-end tools (Verilog …
Hillsboro, Oregon, United States +4 locations
Pay posted by employer$122,440–$232,190 USD per year
… demanded by modern AI workloads. Position Overview We are seeking an experienced design automation engineer passionate about driving innovation at the intersection between emerging semiconductor technology, physical …
Irvine, California, United States
… Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Principal, Digital IC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the high performance …
Fort Collins, Colorado, United States
Pay posted by employer$91,100–$146,000 USD per year
Broadcom’s ASIC Product Division (APD) is focused on enabling customers to develop products with a sustainable and …
Santa Clara, California, United States
We are looking for a talented Senior System Software Engineer to help build NVIDIA Halos, our full-stack safety platform for physical AI: autonomous vehicles, humanoids, …
US-CA-San Jose, California +1 location
What You'll Be Doing: RTL to Physical Design (RTL2PD) stage experience RTL2PD Design Engineer(ASIC) MUST HAVE : RTL Synthesis, Constraint writing, validation, Static timing Analysis RTL Synthesis, …
China, Shanghai
… needs through prototyping, use-case analysis, and cost/benefit trade-offs. Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
