1,000+ matching jobs for “Design Verification Engineer”

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GE Vernova

V&V Engineer

Chennai, Tamil Nadu, India

Summary Job Description V&V Engineer in AI/ML team will be responsible for defining, executing, maintaining verification and validation …

Added Oct 30, 2026

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Broadcom

DFT Lead Engineer

Austin, Texas, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Principal DFT Engineer Broadcom's ASIC Product Division is seeking candidates for a DFT position at our Austin, Texas Development …

Added Nov 7, 2026

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Broadcom

DFT Lead Engineer

San Jose, California, United States 2 postings

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Principal DFT Engineer Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California, …

Added Nov 4, 2026

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RTX

Systems Engineer

AU-SA-MAWSON LAKES-111 ~ 1-11 Technology Dr ~ BLDG 111

… growth are converging to deliver the next generation of Ground Based Air Defence capability As a Systems Engineer , you will support the operation, sustainment and continuous improvement of Air Defence systems, …

Added Oct 27, 2026

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RTX

Principal Systems Engineer, Responsible Systems Engineer (RSE)

Tucson, Arizona, United States

… The Systems Engineering and Test Center (SETC) organization is currently hiring a Principal Systems Engineer – Section Responsible Systems Engineer to join our Tucson, AZ team in the Advanced Technology Effectors …

Added Oct 27, 2026

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RTX

Sr. Systems Engineer, Responsible Systems Engineer (RSE)

Tucson, Arizona, United States

… defense. The Systems Engineering and Test Center (SETC) organization is currently hiring a Senior Systems Engineer – Section Responsible Systems Engineer to join our Tucson, AZ team in the Advanced Technology Effectors …

Added Oct 27, 2026

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RTX

Principal Systems Engineer, Responsible Systems Engineer (RSE)

Tucson, Arizona, United States

… The Systems Engineering and Test Center (SETC) organization is currently hiring a Principal Systems Engineer – Responsible Systems Engineer to join our Tucson, AZ team in the Effectors System Engineering Department. …

Added Oct 27, 2026

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RTX

Sr. Systems Engineer, Responsible Systems Engineer (RSE)

Tucson, Arizona, United States

… defense. The Systems Engineering and Test Center (SETC) organization is currently hiring a Senior Systems Engineer – Responsible Systems Engineer to join our Tucson, AZ team in the Effectors System Engineering Department. …

Added Oct 27, 2026

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RTX

Principal System Engineer

AU-WA-HENDERSON-001 ~ 1 Mcgrath Rd ~ MCGRATH

Design, develop and implement product solutions for integration into the Combat System. Lead and conduct product …

Added Oct 28, 2026

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Thermo Fisher Scientific

Mechanical Engineer

Sichuan, China

… DESCRIPTION: Contribute to innovations that make the world healthier, cleaner, and safer. As a Mechanical Engineer II, you'll work on sophisticated scientific instruments and laboratory equipment, collaborating with …

Added Oct 31, 2026

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GE HealthCare Technologies

Staff Software Engineer

Waukesha, Wisconsin, United States

Summary The Staff Software Engineer will serve as a technical leader for test automation and Continuous Testing across CT software products. …

Added Oct 27, 2026

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RTX

Principal Systems Engineer

Tucson, Arizona, United States

… a safer, more secure world. Systems Engineering and Test Capabilities (SE&TC) offers the opportunity to design, develop, and integrate innovative solutions across the full systems engineering lifecycle. Working in a …

Added Oct 27, 2026

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RTX

Senior Systems Engineer

Tucson, Arizona, United States

Added Oct 27, 2026

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KLA

System Engineer

Migdal Ha‘Emeq, Northern District, Israel

Full time
Regular

… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and inspection …

Added Oct 15, 2026

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GE HealthCare Technologies

Mechanical Engineer

IND19-01-Bengaluru-EPIP 122 (Phase II)

Summary Activities contributing to the design and development of products, solutions and systems. Includes activities linked to technical improvement of …

Added Oct 27, 2026

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Abbott Laboratories

Senior RF Engineer

Plano, Texas, United States

Pay posted by employer$78,000–$156,000

Job Title Senior RF Engineer Working at Abbott At Abbott, you can do work that matters, grow, and learn, care for yourself and your …

Added Oct 15, 2026

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Stryker

Senior Software Engineer

Gurugram, Haryana, India

… and supporting integration between medical devices, mobile applications, and cloud-based systems. The engineer will contribute throughout the product development lifecycle, from concept development through …

Added Oct 27, 2026

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KLA

Mechanical Engineer

Migdal Ha‘Emeq, Northern District, Israel

Full time
Regular

… analyses, including thermal, vibration, fluid, and FEA simulations (advantage). Lead and participate in design reviews throughout the development process. Procure prototype parts and support vendor interactions. …

Added Oct 15, 2026

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The Home Depot

Principal Mechanical Engineer

SIMPL - 8820

In person
Full time
Regular

Pay posted by employer$150,000–$200,000

We are seeking an experienced Principal Mechanical Engineer to provide technical leadership in the development of complex electromechanical automation systems. This …

Added Oct 16, 2026

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KLA

NPI Engineer

Singapore, Singapore

Full time
Regular

NPI engineer in production site serve as the engineering representative on-site, acting as “NPI eyes and hands” in …

Added Oct 15, 2026

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Broadcom

DFT Lead Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Same role posted 2 times, once per location

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About this opportunity

Original employer description

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Job Description:

Principal DFT Engineer

Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California, Development Center. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production.

The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Products Division)’s designs – DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also involve direct interaction with external customers.

It is expected that you can code using TCL, PERL, RUBY, PYTHON, C++ or similar.

Responsibilities:

Understanding Broadcom & customer DFT feature requirements & DPPM goals & defining appropriate DFT specifications for the ASIC
Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
Working closely with STA and DI Engineers design closure for test
Generating, Verifying & Debugging Test vectors before tape release.
Validating & Debugging Test vectors on ATE during the silicon bring up phase
Assisting with silicon failure analysis, diagnostics & yield improvement efforts
Interfacing with the customer, physical design and test engineering/manufacturing teams located globally
Working closely with I/P DFT engineers & other stakeholders
Debugging customer returned parts on the ATE
Innovating newer DFT solutions to solve testability problems in 7nm & beyond
Automating DFT & Test Vector Generation flows

Skills/Experience:

Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others)
Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.)
Well-versed in ATPG vector generation, simulation, and debugging. (TetraMax, Fastscan)
Experience in Verilog coding, testbench generation & simulation
Memory BIST insertion and verification experience on embedded (SRAM, CAM, eDRAM, ROM)
Boundary scan Verification and test vector generation. Should have good knowledge in IEEE1149.1 and IEEE1149.6
Basic knowledge Test-STA and constraints
Strong background on IEE1687, IJTAG, ICL and PDL
The ability to work in a multi-disciplined, cross-department environment
Solid knowledge in analog and digital circuit design, and device physics fundamentals
Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles
Excellent problem solving, debug, root cause analysis and communication skills
Experience working on the ATE is a plus
Experience with Serdes, DDR, PCIE, ENET, CXL IOBIST verification and silicon debug is a plus
Experience working on Tessent SSN is highly desired

Education & Experience:

Bachelors in Electrical/Electronic/Computer Engineering and 12+ years of relevant industry experience or Masters Degree in Electrical/Electronic/Computer Engineering and 10+ years of relevant industry experience

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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Keywords also found in description

Full time
R&D
Regular

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