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Broomfield, Colorado, United States +3 locations
Pay posted by employer$121,900–$195,000 USD per year
… and modern engineering workflows to drive functional, physical, and deployment readiness for complex ASIC blocks in advanced technology nodes. Responsibilities Include: Synthesis & Low-Power Implementation: …
Bengaluru, Karnataka, India
… and solving multitude design issues at partition/cluster and full chip. Expertise with multiple aspects of ASIC integration including Floorplanning, Clock and Power distribution, global signal planning, I-O planning and …
China, Shanghai
… targets for architectural changes and new features. We identify power-saving opportunities throughout the ASIC design process—from architecture definition through place and route—and resolve power issues that could …
Santa Clara, California, United States
We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the …
Santa Clara, California, United States
We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the …
Bengaluru, Karnataka, India
… of disciplines and responsibilities in supporting the Processor based subsystem verification for the ‘ASIC Products Division’ within Broadcom Limited. Responsibilities will include Verification environment …
Santa Clara, California, United States
3We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the …
Singapore, Singapore
… component platforms with high speed Silicon photonics, transmit and receive amplifiers, controller ASIC’s with Marvell DSP’s. These components are made operational with a highly functional embedded firmware. The …
Hillsboro, Oregon, United States +4 locations
Pay posted by employer$122,440–$232,190 USD per year
… • 3+ years of pre-silicon verification or post-silicon validation experience in SoC accelerators or custom ASIC designs. • 3+ years of experience in UVM and constrained random verification methods. • 2+ years of …
Hsinchu City
… with key stakeholders Excellent leadership and communication skills Must have a broad background in ASIC or other Microelectronics semiconductor product development 
This role is eligible to participate in …
Bengaluru, Karnataka, India
… You Can Expect Marvell’s Central Engineering team is seeking a talented High-speed IC package development engineer to contribute to the development of advanced microelectronic packages. The engineer will be responsible for …
United States-Maryland-Linthicum
Pay posted by employer$119,600–$179,400
… team members Documentation of design and analysis reports as well as test reports Level 3 FPGA Design Engineer Basic Qualifications: (Level 3 education requirements) Bachelors in STEM discipline with 5 years of related …
Austin, Texas, United States
Bengaluru, Karnataka, India
… validate, and deliver power analysis reports (dynamic, leakage, glitch) to design teams across multiple ASIC projects by building power dashboard Experience with PrimePower RTL 2.0 adoption for early-stage power …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… Familiarity with revision control concepts and tools (e.g. Git, Subversion) Qualifications We Prefer ASIC / FPGA lab validation with advanced lab equipment Design for Test (DFT) and manufacturability issues …
Belgrade, Central Serbia, Serbia
… CISCO Silicon One™, are building SDK, firmware, simulator, and compiler for the top-of-the-line Networking ASIC. The SDK System & Performance team manages all of SDK features that are device agnostic. This involves …
Santa Clara, California, United States
… optimization solutions. You will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques …
USA-Mendota Heights-Northland
Pay posted by employer$109,700–$175,500 USD per year
Senior Digital / Mixed-Signal IC Design or Verification Engineer Location: Mendota Heights, MN or Broomfield, CO Job Description Summary Join Broadcom, a global technology …
Toronto, Ontario, Canada
NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that enables the next generation …
Office - India - Bangalore Bagmane Tech Park
Job Summary As a Principal Software Engineer in the Platform Software group, you will be instrumental in designing and developing our cutting-edge …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
