Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
… of Tcl, Python and Perl. Knowledge of constrained-random verification and functional coverage. Knowledge of ASIC design flow and verification methodologies. Preferred qualifications UVM and advanced System Verilog …
… workloads, and next-generation data center architectures. We are seeking a hardworking and experienced ASIC Link Modeling Engineer to join our team and be a collaborative modeler for Cisco's silicon photonics …
… performance. Minimum Qualifications Bachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design Verification experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ …
… best work. Come join the team and see how we can make a lasting impact on the world! We are looking for an ASIC Verification Intern to join our team working in the Toronto office! In this position, you will handle the …
… Clearance Status: Active and existing security clearance required on day 1 The Mission Systems FPGA/ASIC and Foundational Software team is seeking a Project Engineer to lead the development of advanced FPGA and …
… Clearance Status: Active and existing security clearance required on day 1 The Mission Systems FPGA/ASIC and Foundational Software team is seeking a Project Engineer to lead the development of advanced FPGA and …
Santa Clara, California, United States +1 location
… interconnect/cache/core design is desirable. Verilog expertise is preferred as is a deep understanding of ASIC design flow including RTL design and verification, DFT, and ECO. Strong communication and interpersonal …
… power the future of the digital world. You will be part of the Silicon One development organization as an ASIC Technical Lead- MBIST engineer. As a member of this team you will be involved in crafting cutting edge next …
Pay posted by employer$129,400–$207,000 USD per year
… related to package design: Package-Design lifecycle How the substrate and package fit into the overall ASIC design and manufacturing flows Design Data, including how it is created and used: .mcm, package …
We are seeking an experienced and technically exceptional Staff Engineer for a role as Digital ASIC Chip Architect and Signal Processing System Engineer to join a high-performing …
… systems, advancing U.S. leadership in space while amplifying human creativity and intelligence. As a Boeing engineer, you’ll join a diverse, collaborative team solving high‑impact challenges in complex semiconductor design. …
… more, and work quickly. Join us to power the future of the digital world. Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII implementation flow for advanced semiconductor nodes. …
Durham, North Carolina, United States +2 locations
… in the world and there has never been a more exciting time to join our team! We are seeking a Verification Engineer - New College Graduate for our Memory Management Unit to verify the world’s leading GPUs. What you’ll be …
… the future of the digital world. Your Impact You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You will work with Front-end RTL …
Lead and Develop a High-Performing Engineering Team: Lead, mentor, and grow a team of FPGA and ASIC engineers from entry level to experienced professionals, including hiring, staffing, and fostering a …
Santa Clara, California, United States +1 location
… join the team and see how you can make a lasting impact on the world. We are now looking for a motivated ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you want to challenge …