547 matching jobs for “ASIC Engineer”

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Nvidia

Senior ASIC Floorplan Design Engineer

Santa Clara, California, United States +1 location

We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the …

Added Oct 31, 2026

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Nvidia

Senior ASIC Design Engineer - GPU

Durham, North Carolina, United States +2 locations

We are now looking for a Senior ASIC Engineer! NVIDIA is searching for an outstanding ASIC Engineer to build and implement an MMU for the world’s top …

Added Oct 31, 2026

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Arrow Electronics

Senior ASIC RTL Design Engineer

Noida, Uttar Pradesh, India +2 locations

Full time
Regular

Added Oct 27, 2026

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Nvidia

ASIC Design Engineer - Performance Monitoring

Bengaluru, Karnataka, India

NVIDIA System-On-Chip (SOC) group is hiring for an ASIC Design Engineer! The complexity of the chips we build has increased manifold over the years. We are now …

Added Oct 27, 2026

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Cisco Systems

ASIC Test Engineer (Onsite)

San Jose, California, United States

Pay posted by employer$167,700–$245,200

… portfolio. Your Impact Drive qualification, reliability, and RMA testing activities for Silicon One ASIC products using ATE platforms and silicon debug methodologies. Partner with Product Test Engineering, DFT, …

Added Oct 27, 2026

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RTX

FPGA/ASIC Engineer II (Onsite)

US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A

You will support requirements capture and ASIC / FPGA digital architecture. You will implement ASIC / FPGA digital design using RTL. You will support …

Added Oct 27, 2026

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Palo Alto Networks

Senior ASIC Design Verification Engineer

Santa Clara, California, United States

Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products …

Added Oct 27, 2026

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Broadcom

Mechanical Engineer Supporting ASIC Test

Fort Collins, Colorado, United States +1 location

Full time
Regular

Pay posted by employer$121,900–$195,000 USD per year

… for developing thermal management and robust socketing solutions for test and validation PCBs for Broadcom ASIC products targeted at hyperscale data center applications. Broadcom’s market leading products are enabling …

Added Oct 25, 2026

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Nvidia

Senior ASIC Floorplan Design Engineer

Santa Clara, California, United States +1 location

NVIDIA is seeking an experienced ASIC Floorplan Engineer to design and implement the world's leading SOCs, CPUs, and GPUs. This position offers …

Added Oct 27, 2026

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Intel

Senior ASIC Verification Engineer

Israel, Haifa

Added Oct 27, 2026

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Cisco Systems

ASIC Emulation Engineer / Technical Leader

Bengaluru, Karnataka, India

… the emulation env, build netlists and use the same to speed up the development cycle and find potential ASIC issues during pre-silicon phase • Work with leading emulation vendors to troubleshoot issues. What You’ll …

Added Oct 27, 2026

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Broadcom

ASIC Design Verification Engineer

Irvine, California, United States +2 locations

Full time
Regular

Pay posted by employer$129,400–$207,000 per year

Added Oct 5, 2026

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Cisco Systems

Senior ASIC Design Verification Engineer

San Jose, California, United States

Pay posted by employer$167,700–$245,200

… experiment more, and work quickly. Join us to power the future of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center …

Added Oct 27, 2026

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Broadcom

ASIC Design Verification Engineer

Irvine, California, United States +2 locations

Full time
Regular

Added Oct 15, 2026

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Cisco Systems

ASIC DFT Engineer - Acacia (Hybrid)

San Jose, California, United States

Pay posted by employer$155,000–$222,600

include: Support DFT implementation for ASIC / SoC blocks and subsystems Implement and validate scan insertion, scan compression, OCC, MBIST, boundary …

Added Oct 28, 2026

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Nvidia

Senior ASIC Verification Engineer - GPU

Santa Clara, California, United States

NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world’s leading GPUs. In this role, you will be doing unit level …

Added Oct 28, 2026

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Cisco Systems

ASIC Design Engineer Technical Lead

San Jose, California, United States

Pay posted by employer$186,900–$267,700

… in the lab. Minimum Qualifications Bachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ years of …

Added Oct 27, 2026

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Intel

Senior ASIC DFT Engineer

Israel, Haifa

Added Oct 27, 2026

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Nvidia

ASIC Design Engineer – Clocks IP

Santa Clara, California, United States +1 location

The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team …

Added Oct 27, 2026

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Cisco Systems

ASIC Physical Design Engineer

San Jose, California, United States

Pay posted by employer$155,000–$222,600

… more, and work quickly. Join us to power the future of the digital world. Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII implementation flow for advanced semiconductor nodes. …

Added Oct 28, 2026

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Cisco Systems

ASIC Test Engineer (Onsite)

San Jose, California, United States

Pay posted by employer$167,700–$245,200

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Minimum Qualifications · employer excerpt

Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or equivalent experience.
8+ years of experience in IC test engineering, SoC/VLSI test bring-up, characterization, and production testing.
Experience with Advantest 93000 Smartscale and Exascale for test program development, silicon debug, and characterization.
Hands-on experience debugging silicon failures and isolating issues to the flop or cell level.
Proficiency in C, C++, Java, 93k test methods, and Python.

About this opportunity

Original employer description

The application window is expected to close on: 11/19/2026

This is an onsite position in San Jose, California, United States.

NOTE: Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

Meet the Team

The Silicon Operations Quality and Reliability team ( SiOps) plays a critical role in ensuring the quality, reliability, and production readiness of Cisco Silicon One products. The team SiOps supports the development and validation of advanced ASICs (Application-Specific Integrated Circuits), which are custom-designed chips that power high-performance networking and data infrastructure solutions. Working closely with Product Test Engineering, DFT, and Design Engineering teams, the group develops and executes qualification, reliability, and RMA testing strategies that help deliver reliable silicon products at scale. Their work directly impacts silicon validation, failure analysis, and continuous improvement of manufacturing test coverage across new product revisions. This is an opportunity to work on advanced semiconductor technologies while solving complex engineering challenges that influence Cisco’s networking portfolio.

Your Impact

Drive qualification, reliability, and RMA testing activities for Silicon One ASIC products using ATE platforms and silicon debug methodologies. Partner with Product Test Engineering, DFT, and Design Engineering teams to define ATE test strategies, qualification hardware requirements, and data analytics workflows that improve silicon quality and production readiness. Perform silicon failure analysis and debug system-level failures down to the flop or cell level to identify root causes and support corrective actions. Develop and enhance test coverage by defining new patterns and parametric conditions, correlating ATE behavior to system failures, and transitioning validated solutions into volume manufacturing. Analyze qualification and reliability data to identify trends, improve test effectiveness, and strengthen overall product reliability.

Minimum Qualifications

Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or equivalent experience.
8+ years of experience in IC test engineering, SoC/VLSI test bring-up, characterization, and production testing.
Experience with Advantest 93000 Smartscale and Exascale for test program development, silicon debug, and characterization.
Hands-on experience debugging silicon failures and isolating issues to the flop or cell level.
Proficiency in C, C++, Java, 93k test methods, and Python.

Preferred Qualifications

Experience with IC component qualification and reliability failure modes.
Working knowledge of data analysis tools such as JMP, statistical analysis methods, and AI/ML techniques for test data analytics.
Hands-on experience analyzing component failures at the system level and performing fault isolation.
Knowledge of electrical and physical failure analysis techniques.
Strong problem-solving and cross-functional collaboration skills.

siops

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $167,700.00 to $245,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and
Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$167,700.00 - $282,000.00

Non-Metro New York state & Washington state:

$149,100.00 - $250,900.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

Why this result? · Employer labels

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