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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Bengaluru, Karnataka, India
… - Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules). - Strong layout knowledge in submicron processes (e.g., 7nm, 5nm, 3nm, 2nm). …
Bengaluru, Karnataka, India
… required. - Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - CALIBRE & Hercules). - Strong layout knowledge in submicron processes (e.g., A14, 2nm, 3nm, 5nm, …
Santa Clara, California, United States
We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This …
Bengaluru, Karnataka, India
The Role and Impact: As a GPU Logic Design Engineer, you will be instrumental in developing the next generation of graphics IPs, contributing directly …
Santa Clara, California, United States
NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission is to build the IP that enables the next …
Boise, ID - Main Site
Define and implement DFT, testmode, and related design methodology requirements for current and future memory products Design and evaluate new DFT circuit and …
Santa Clara, California, United States
… Come join the team and see how we can make a lasting impact on the world. We are seeking to hire a ASIC Verification Engineer - New College Grad 2027 to contribute to the design verification activities that support the …
Santa Clara, California, United States +1 location
NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 per year
We are seeking a hands-on Principal Digital Design Engineer to serve as the Chip Lead for our next-generation silicon projects. In this high-impact role, you …
Bengaluru, Karnataka, India
NVIDIA System-On-Chip (SOC) group is hiring for an ASIC Design Engineer! The complexity of the chips we build has increased manifold …
Hsinchu - Chang Yih, Taiwan
Design, implement, and debug complex logic designs. Integrate your IP into larger and more complex IPs. Support …
Santa Clara, California, United States
We are now looking for a Senior ASIC Design Engineer to join our DFT team! NVIDIA has continuously reinvented itself over two decades. Our invention of …
Armenia
… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …
China, Beijing, Haidian, Xixiaokou
… RTL development, synthesis, timing closure, DFT collaboration, and close partnership with physical design teams to deliver robust, production‑ready designs. Key Responsibilities: Define and develop system-level …
Bengaluru, Karnataka, India
The Role and Impact : As a GPU Logic Design Engineer, you will play a pivotal role in developing and optimizing the RTL design for cutting-edge …
Westford, Massachusetts, United States
… and see how you can make a lasting impact on the world. NVIDIA is looking for best-in-class Senior Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high …
Fort Collins, Colorado, United States +1 location
Pay posted by employer$121,900–$195,000 USD per year
… SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical …
United Kingdom, Edinburgh, SC, Freer
… with unmatched technologies that sense, measure, and connect. Analog Devices is seeking a senior digital design engineer for its Data Center & Energy (DCE) group in Limerick, Ireland. Within DCE, we deliver …
Santa Clara, California, United States
… Make the choice to join us today. The GPU clocks group is looking for an exceptional ASIC Clocks Verification Engineer. The team is responsible for crafting all aspects of GPU clocking. The team collaborates with the …
Folsom, California, United States +1 location
Pay posted by employer$141,910–$200,340 USD per year
As a GPU Logic Design Engineer at Intel, you will play a critical role in shaping the future of graphics and compute …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
