74 matching jobs for “Senior Verification Engineer, PCIE”

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Nvidia

Senior Verification Engineer, PCIE

India, Bengaluru

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express …

Added Oct 27, 2026

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Nvidia

Senior Verification Engineer, PCIE

India, Bengaluru 4 postings

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express …

Added Oct 27, 2026

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Nvidia

Verification Engineer, PCIE

India, Bengaluru

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express …

Added Oct 27, 2026

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Nvidia

PCIe IP Verification Engineer

India, Bengaluru

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express …

Added Oct 27, 2026

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Cisco Systems

Senior Design Verification Engineer

Belgrade, Serbia

Meet the Team Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. …

Added Oct 27, 2026

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Intel

Senior Design Verification Engineer

US, California, Santa Clara

Pay posted by employer$164,470–$311,890 USD per year

About the Role Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own end-to-end …

Added Oct 27, 2026

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Nvidia

Senior Chip Design Verification Engineer

Israel, Yokneam +1 location

NVIDIA's Chip Design group is looking for best-in-class Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed …

Added Oct 27, 2026

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RTX

Senior Electrical Engineer - FPGA Verification

Marlborough, Massachusetts, United States +1 location

… random tests, while tracking functional and code coverage using UVM Create complete documentation including verification plan and report Demonstrate self-motivation, with little supervision required Work cooperatively with …

Added Oct 27, 2026

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Intel

Design Verification Engineer

US, California, Santa Clara

Pay posted by employer$105,650–$149,150 USD per year

About Intel & Silicon Chassis Intel is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to the verification of …

Added Oct 27, 2026

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Intel

Design Verification Engineer

US, California, Santa Clara +1 location

Pay posted by employer$141,910–$200,340 USD per year

Job Description Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation …

Added Oct 27, 2026

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Cisco Systems

Senior ASIC Design Verification Engineer

San Jose, California, United States

Pay posted by employer$167,700–$245,200

… more, and work quickly. Join us to power the future of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You will …

Added Oct 27, 2026

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RTX

Senior Firmware Verification Engineer - UVM

Marlborough, Massachusetts, United States

Generate firmware verification requirements based on the system architecture Generate firmware verification documentation that describes …

Added Oct 27, 2026

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Intel

Senior Design Verification Engineer - Neuromorphic Computing

US, Oregon, Hillsboro +4 locations

Pay posted by employer$122,440–$232,190 USD per year

… the versatility demanded by modern AI workloads. Position Overview We are seeking experienced pre-silicon verification engineers who are passionate about driving innovation at the intersection of advanced semiconductor …

Added Oct 27, 2026

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Nvidia

Senior Verification Engineer - HSIO Unit Level

India, Bengaluru +1 location

… on the world. We are seeking hardworking, determined, and imaginative individuals to join our automotive verification group. As the owner of HSIO IP's unit level verification, you will contribute to projects crafting the …

Added Oct 28, 2026

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GE Aerospace

Staff Engineer - FPGA Design/Verification

Grand Rapids, Michigan, United States +2 locations

Full time
Regular

Summary GE Aerospace is seeking an experienced Staff Engineer – FPGA Design/Verification to lead the development of custom logic for advanced avionics hardware. This role supports the full FPGA …

Added Oct 27, 2026

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RTX

Senior ASIC/FPGA Verification Engineer (Onsite)- Active Secret

US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A

… shape the future of aerospace and defense. Collins Aerospace is seeking a highly skilled and innovative Senior ASIC/FPGA Verification Engineer to join our Applied Research and Technology (ART) Microelectronics …

Added Oct 27, 2026

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RTX

Sr Electrical Engineer – Design Verification - FPGA/ASIC (Onsite)

Cedar Rapids, Iowa, United States

Develop verification plans based on requirements capture, decomposition, and traceability. Architect and implement advanced …

Added Oct 27, 2026

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Boeing

ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal)

USA - Albuquerque, NM

In person
Full time
Regular

Pay posted by employer$136,850–$185,150

ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons …

Added Oct 15, 2026

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Thermo Fisher Scientific

Sr. Electronics Engineer - FPGA

Guangdong, China

… Unity Lab Services, Patheon and PPD. For more information, please visit www.thermofisher.com . Job Title: Senior Electronics Engineer - FPGA Location: Guangzhou Reports to: Senior Manager, Manufacturing Engineering …

Added Oct 16, 2026

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RTX

Senior FPGA Engineer

Huntsville, Alabama, United States

… design, and documentation of deliverable FPGA embedded processing at Raytheon. In this role as a Senior FPGA Engineer, you will develop FPGA designs for all major vendors and device families including AMD, …

Added Oct 27, 2026

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Cisco Systems

Senior ASIC Design Verification Engineer

San Jose, California, United States

Pay posted by employer$167,700–$245,200

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Minimum Qualifications · employer excerpt

Bachelors degree in Computer, Electrical or Electronics Engineering, + 7 years of relevant technical experience, or Masters degree + 4 years of relevant technical experience with a focus on ASIC design and verification.
Experience in OOP concepts, System Verilog or UVM methodology.
Experience leading verification teams or assignments projects.
Experience with scripting using Perl and/or Python.

About this opportunity

Original employer description

The application window is expected to close on: 11/19/2026

Meet the Team

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You will define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms, contribute to a multi-disciplined engineering teams to meet the power, performance, and area goals for products. You will:

Drive the definition, architecture, and design of high-performance ASICs while owning complex or multiple functional areas.
Define new verification methodologies to support advanced design architectures and develop re-usable code for future projects.
Lead design verification effort by solving block-level issues and participate in cluster and chip-level issue resolution, and drive reviews to recognize areas of architectural concerns.
Architect, develop, and maintain cluster and top-level Design Verification (DV) environment infrastructure.
Build DV environments from scratch for cluster and chip levels.
Develop, implement, and enhance test plans and tests for cluster and chip verification, using both constraint-random and directed stimulus.
Ensure comprehensive verification coverage through code and functional coverage implementation and review.
Qualify RTL design by running Gate Level Simulations with timing annotation on netlists.
Support design testing in emulation environments.
Debug issues at ASIC, SW and Systems levels and help in lab bring-up and post silicon validation.

Minimum Qualifications

Bachelors degree in Computer, Electrical or Electronics Engineering, + 7 years of relevant technical experience, or Masters degree + 4 years of relevant technical experience with a focus on ASIC design and verification.
Experience in OOP concepts, System Verilog or UVM methodology.
Experience leading verification teams or assignments projects.
Experience with scripting using Perl and/or Python.

Preferred Qualifications

Experience with forwarding logic, parsers, or P4.
Experience using emulation platforms such as Veloce, Palladium, Zebu, or HAPS.
Knowledge of formal verification tools (e.g., IEV or VC Formal).
Domain knowledge in one or more protocols such as PCIe, CXL, Ethernet, RDMA, DDR, or TCP.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $167,700.00 to $245,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and
Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$167,700.00 - $282,000.00

Non-Metro New York state & Washington state:

$149,100.00 - $250,900.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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