Nvidia
ASIC Design Engineer - New College Grad 2026
Santa Clara, California, United States
NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This position offers the opportunity to …
Searching jobs…
ASIC Verification Engineer · AnywhereEdit
Filters
373 matching jobs for “ASIC Verification Engineer”
How results work
Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Cisco Systems
ASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |8-12 years| Pune)
Pune, Maharashtra, India
… technologies including AI/ML workloads, and next-generation data center architectures. Your Impact As a Verification Engineer, you will work with a diverse team of engineers spanning multiple disciplines. At the concept …
Nvidia
ASIC Design Engineer - New College Grad 2027
Santa Clara, California, United States
… people in the world and there has never been a more exciting time to join our team! We are seeking an ASIC Design Engineer - New College Graduate to implement the world’s leading SoC's and GPU's. This position …
Boeing
ASIC / FPGA Digital Design Engineer – (Lead or Senior)
USA - El Segundo, CA +1 location
- Full time
- Regular
Pay posted by employer$146,200–$197,800
ASIC / FPGA Digital Design Engineer – (Lead or Senior) Company: Boeing Space, Intelligence & Weapons Systems has …
Boeing
ASIC / FPGA Digital Design Engineer – (Associate or Experienced)
USA - El Segundo, CA +1 location
- Full time
- Regular
Pay posted by employer$98,600–$133,400
ASIC / FPGA Digital Design Engineer – (Associate or Experienced) Company: Boeing Space, Intelligence & Weapons …
Nvidia
Senior Design Verification Engineer - GPU Memory Subsystem
Durham, North Carolina, United States
… see how you can make a lasting impact on the world. We're looking for a talented, motivated Senior Design Verification Engineer to join our GPU memory subsystem team in Durham, NC. Looking to join a dynamic team solving …
RTX
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… and defense. We are seeking an experienced and highly motivated Senior Principal Electrical or Computer Engineer to support the design, development, and integration of advanced digital ASIC and FPGA solutions for …
RTX
Senior Principal Electrical Engineer (FPGA/ASIC) - HYBRID
Cedar Rapids, Iowa, United States
… Join us and help shape the future of aerospace and defense. We are hiring a Senior Principal Electrical Engineer (P5) for our growing Avionics FPGA/ASIC team in Cedar Rapids, IA. This position is for a highly experienced …
Cisco Systems
Leader, ASIC Engineering
Hsinchu, Taiwan, Taiwan +1 location
• Test Architecture & Development: Drive test program development and verification on automated test equipment (Advantest V93000 / SmarTest 7 & SmarTest 8) across digital, high-speed SerDes, …
Nvidia
Senior ASIC Design Engineer, GPU Core Pipeline IP
Bengaluru, Karnataka, India
NVIDIA is seeking a highly enthusiastic and motivated Design Engineer to design and implement the next generation of control subsystems for the world’s leading GPUs. This …
Cisco Systems
Senior ASIC Engineer - Post Silicon Validation
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… Join us to power the future of the digital world. Your Impact: In this role as a Post-Silicon Validation Engineer, you will be responsible for: Planning and setting up Silicon Bring-up infrastructure, including system …
Cisco Systems
Design Verification Technical Leader
Carlsbad, California, United States +1 location
Pay posted by employer$192,400–$275,800
… Cisco’s industry-defining Silicon One Optics group, you won’t just follow the future of networking—you’ll engineer it. We are actively building the hyper-scalable optical transceivers and modules (800G, 1.6T, and beyond) …
Nvidia
ASIC Physical Design Engineer - New College Grad 2027
China, Shanghai
… of the implementation of the construction chip is the guarantee of the company's competitiveness. As an ASIC-PD engineer at NVIDIA, you'll be responsible for the stage from RTL frozen to tape out, include synthesis, …
Intel
Senior Formal Verification Engineer – AI SoC Development
Folsom, California, United States +3 locations
Pay posted by employer$220,920–$311,890 USD per year
… driving innovation in next-generation ASICs for AI applications across edge and cloud. As a Senior Formal Verification Engineer, you will play a critical role in ensuring the functional correctness of complex digital designs …
RTX
FPGA Verification Engineer II (Onsite)- Active Secret
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
Verification environment architecture and design using SystemVerilog with OVM/UVM Creation of written test plan, …
Cisco Systems
Leader/Manager, ASIC Design Verification Engineering || Verilog, UVM, TestBench, Technical Leadership, Hardware Emulation, SOC || Exp - 15 + years
Bengaluru, Karnataka, India
… networking company in the world! Your Impact Cisco SiliconOne team is looking for an expert and talented ASIC Engineering Leader. You will have an ASIC design verification background with hands-on experience in System …
Cisco Systems
ASIC STA Technical Lead
San Jose, California, United States
Pay posted by employer$186,900–$267,700
… the future of the digital world. Your Impact You will be in the Silicon One development organization as an ASIC DFT STA Technical Lead. You are a detail-oriented STA engineer with strong analytical skills and a deep …
Cisco Systems
Senior ASIC DFT DV Engineer (Hybrid)
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification. Minimum Qualifications Bachelor’s in Electrical Engineering or equivalent with at least 7+ years (or …
Cisco Systems
Senior ASIC DFT DV Engineer (Hybrid)
San Jose, California, United States +1 location
Pay posted by employer$167,700–$245,200
… ATE screening, in-system test, debug and diagnostics needs of the design Collaborate with the design/design-verification and PD teams to enable the integration and validation of the test logic in all phases of the implementation …
Cisco Systems
ASIC DFT DV Technical Leader
Armenia
… ATE screening, in-system testing, debugging, and diagnostics. We collaborate closely with design, design-verification, and product development teams to integrate and validate test logic throughout implementation and …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.