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Bengaluru, Karnataka, India 2 postings
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, …
Bengaluru, Karnataka, India
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Product Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, …
Bengaluru, Karnataka, India
GPU Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation for Media …
Tucson, Arizona, United States
… over the world, from the ground to exoatmospheric environments and into space. As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device families including: Xilinx, Altera, and …
Santa Clara, California, United States +1 location
… adoption by joining NVIDIA's Advanced Technology Group! We are looking for a Full-Chip RTL Integration Engineer to join our dynamic and growing FE-ASIC development team. In this role, you will be responsible for …
Bengaluru, Karnataka, India
… fault (TDF) models using on-chip test compression techniques. MBIST Design (including repair) and Verification using Siemen’s EDA tool. Validation of DFT structures/patterns in RTL, Netlist with and without SDF. Work …
Marlborough, Massachusetts, United States
Requirements capture, FPGA digital architecture and design using RTL, timing closure, verification, and system integration Optimize FPGA implementations to meet performance, power, and size constraints. …
San Jose, California, United States +3 locations
Pay posted by employer$143,800–$230,000 USD per year
… partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC). Drive tools and methodologies to achieve desired PPA metrics. Complete equivalence checks, STA, …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… from architecture and design through production and sustainment. The MPD department is seeking an FPGA Engineer II to join our team. In this role, you will leverage advanced technologies to create cutting-edge solutions …
Bengaluru, Karnataka, India
The Role and Impact: As a GPU Logic Design Engineer, you will be instrumental in developing the next generation of graphics IPs, contributing directly to the …
China-Shanghai-Zhangjiang Hi Tech
… customers to develop state of the art IC solutions utilizing Broadcom's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and …
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… more, and work quickly. Join us to power the future of the digital world. Your Impact Develop and maintain ASIC APIs and SDKs in C and C++, delivering clean, scalable updates that support emulation, bring-up, and …
Bengaluru, Karnataka, India +1 location
… analysis (STA) and drive sign-off across PVT corners and operating modes. Identify and resolve physical verification issues (DRC/LVS/ERC) in close partnership with process/CAD/foundry teams, ensuring robust …
Melbourne, Florida, United States
… market. Join us and help shape the future of aerospace and defense. Collins Aerospace is seeking a FPGA Engineer II for the CNS (Communication, Navigation, Surveillance) Hardware Engineering Group in Melbourne, Florida. …
Irvine, California, United States +1 location
… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Digital ASIC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the …
Bengaluru, Karnataka, India
… all the pieces for a given defined project milestone and deliver the model to relevant teams for further verification at cluster/sub-system/SOC/emulation levels. What we need to see: BS (or equivalent experience) / MS with 3+ …
Fort Collins, Colorado, United States
Pay posted by employer$129,400–$207,000 USD per year
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing …
Bengaluru, Karnataka, India
… reviews Cross-Functional Collaboration Work closely with: RTL designers Physical design (PD) Functional verification Product engineering and manufacturing Communicate DFT requirements and risks clearly to stakeholders …
Malaysia, Penang 2 postings
… talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build world-changing …
Hsinchu, Taiwan, Taiwan +1 location
… life’s work, to amplify human creativity and intelligence. We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
