29 matching jobs for “Senior Engineer - Standard Cell Design”

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Micron Technology

Senior Engineer - Standard Cell Design

Hyderabad - Phoenix Aquila, India 2 postings

Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to …

Added Nov 3, 2026

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Intel

Senior Standard Cell Library Engineer

Santa Clara, California, United States +1 location

Pay posted by employer$122,440–$232,190 USD per year

About the Organization Intel's Foundry Standard Cell team is seeking a talented and motivated Senior Design Engineer to join our growing team . In this …

Added Oct 27, 2026

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General Motors

Senior Advanced Battery Cell Engineer – Cell Assembly Processes

Warren, Michigan, United States

… role is categorized as onsite. This means the successful candidate is expected to report to Wallace Battery Cell Innovation Center in Warren, Michigan on a full-time basis. At General Motors, our product teams are …

Added Oct 18, 2026

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Micron Technology

Senior Engineer - NAND Cell Reliability

Fab 10N/X, Singapore

will be: Risk assessment of NAND cell reliability, identification of the process/trim/test strategy to bridge the gaps for JEDEC and internal …

Added Nov 3, 2026

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Nvidia

Senior Circuit Design Engineer

Santa Clara, California, United States

We are now hiring for a Senior Circuit Design Engineer for Standard Cell and/or ROM. NVIDIA has been transforming computer graphics, PC …

Added Oct 31, 2026

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Cisco Systems

Senior Circuit Design Engineer

Armenia

Drive the architecture, design, and implementation of high-performance ASIC subsystems and IP from specification through silicon …

Added Oct 31, 2026

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Nvidia

Senior Physical Design and Timing Engineer

Westford, Massachusetts, United States

… join the team and see how you can make a lasting impact on the world. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering team, developing the …

Added Oct 27, 2026

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General Motors

Process Engineer – Electrode & Assembly – Battery Cell Development Center

Warren, Michigan, United States

In person
Full time
Regular

The Role The Process Engineer - Electrode & Assembly supports senior engineers in developing, improving, and troubleshooting battery-cell …

Added Oct 15, 2026

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Bristol-Myers Squibb

Manager, Shop Floor Quality Assurance, Cell Therapy

Devens - MA - US

Full time
Regular

Pay posted by employer$100,480–$121,756

… issues. The Manager, Shop Floor Quality Assurance role is stationed in Devens, MA and reports to the Senior Manager, Field Quality Assurance for the Devens CTF. Key Responsibilities Provide leadership to ensure …

Added Oct 15, 2026

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Cisco Systems

Senior ASIC Layout Engineer

Armenia

We are hiring an ASIC Engineer to own standard cell layout for our next-generation ASICs on innovative FinFET and GAA nodes. You will …

Added Oct 28, 2026

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Danaher

Senior Process Engineer

Shanghai, Shanghai, China

Regular

… ranging from fundamental biological research to developing innovative vaccines, new medicines, and cell and gene therapies. At Cytiva you will be able to continuously improve yourself and us – working on …

Added Oct 15, 2026

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Nvidia

Senior VLSI Methodology Engineer

Santa Clara, California, United States

… impact on the world. Are you excited to build the automation infrastructure behind next-generation silicon design? We’re seeking a Senior VLSI Methodology Engineer to join our team and to design automation that powers …

Added Oct 27, 2026

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Caterpillar

Senior Engine Performance Engineer

Mossville, Illinois

Pay posted by employer$112,710–$169,060

… where we work and live. Together, we are building a better world, so we can all enjoy living in it. Senior Engine Performance Engineer Role Description: The Power Systems and Controls Development Team within …

Added Oct 27, 2026

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Nvidia

Senior STA Signoff Methodology Engineer

Santa Clara, California, United States +1 location

… Come join the team and see how you can make a lasting impact on the world. We are seeking an innovative Senior STA Signoff Methodology Engineer to help drive sign-off strategies for the world's leading GPUs, CPUs, LPUs …

Added Oct 27, 2026

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Bristol-Myers Squibb

Senior Specialist, Associate Aseptic Process Validation Engineer

Devens - MA - US

Full time
Regular

Pay posted by employer$87,660–$106,224

… life cycle programs Knowledge and Skills: Experience in cGMP’s and multi-national biopharmaceutical/cell therapy regulations Experience in aseptic processing/validation and facility/clean room design. Experience …

Added Oct 15, 2026

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Bristol-Myers Squibb

Senior Specialist - IT/OT Automation Engineer

Leiden – NL

Full time
Temporary

The OT systems &Automation Engineer will support the operation of Process Automation systems and OT infrastructure. The individual is …

Added Oct 15, 2026

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Cisco Systems

ASIC Layout Engineer

Armenia

We are hiring an ASIC Engineer to design and verify standard cells for our next-generation ASICs on innovative FinFET and GAA nodes. You …

Added Oct 31, 2026

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Danaher

Manufacturing Engineer

Duncan, South Carolina, United States

Regular

Develop, implement, and maintain manufacturing processes, routings, procedures, testing methods, and standard work to ensure safe, efficient, and compliant production that meets quality requirements. Design, develop, …

Added Oct 15, 2026

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General Motors

Senior Hardware Development and Validation Engineer – Engine Lube/Vent

Pontiac, Michigan, United States

… fullest potential as you pursue your career. The Role We are seeking a high‑performing Hardware Development Engineer to plan, develop, and execute engine lubrication and ventilation tests in a world‑class development …

Added Oct 18, 2026

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General Motors

Advanced Battery Systems Engineer

Warren, Michigan, United States

Hybrid
Full time
Regular

… lithium-ion battery packs for future GM vehicles. Collaborate cross-functionally with vehicle, propulsion, cell, thermal, electrical, safety, and analysis teams to converge on battery pack requirements that will meet …

Added Oct 13, 2026

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Cisco Systems

Senior Circuit Design Engineer

Armenia

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Minimum Qualifications · employer excerpt

Bachelor’s degree and 7 years of related experience, or Master’s degree plus 4 years of related experience, or PhD plus 1 year of related experience.
Relevant experience should include ASIC, custom digital, standard-cell, or analog/mixed-signal circuit design and implementation.

About this opportunity

Original employer description

Meet the Team

As part of the team behind Cisco Silicon One—the industry’s only unified silicon architecture spanning top-of-rack switches to web-scale data centers—you’ll help shape Cisco’s groundbreaking solutions by designing, developing, and testing some of the most advanced ASICs in the industry. Our international group focuses on groundbreaking process technology to ensure the efficiency and performance of our ASIC products.

Your Impact

As an ASIC Circuit Design Engineer, you will own the end-to-end development of high-performance ASIC subsystems and reusable IP. You will contribute to achieving aggressive power, performance, area, and reliability goals by developing custom digital and analog/mixed-signal blocks. You will work closely with architecture, physical design, and silicon validation teams to ensure our IP is optimized for the next generation of networking silicon, while employing automation to drive quality and productivity across the entire product lifecycle.

Key Responsibilities

Drive the architecture, design, and implementation of high-performance ASIC subsystems and IP from specification through silicon validation.
Develop and productize standard-cell, custom digital, and analog/mixed-signal IP to meet strict performance and robustness requirements.
Perform transistor-level simulation and optimization, accounting for process, voltage, temperature, and aging conditions.
Define and implement characterization methodologies for standard-cell and mixed-signal models, including the deployment of automated EDA flows.
Collaborate with multi-functional teams, including physical design and system architecture, to define interface requirements and implementation constraints.
Own the physical implementation of complex custom blocks, optimizing for timing, power, signal integrity, and layout-dependent effects.
Analyze silicon results post-bring-up to drive improvements in circuit design, characterization models, and future IP architectures.
Drive technical reviews for schematics, layouts, and methodologies to resolve complex cross-disciplinary issues and mitigate architectural risks.
Develop reusable infrastructure, scripts, and documentation to improve engineering productivity and design quality.
Apply expertise in advanced process nodes, including FinFET and GAA, to push the boundaries of ASIC power-delivery and clocking solutions.

Minimum Qualifications

Bachelor’s degree and 7 years of related experience, or Master’s degree plus 4 years of related experience, or PhD plus 1 year of related experience.
Relevant experience should include ASIC, custom digital, standard-cell, or analog/mixed-signal circuit design and implementation.

Preferred Qualifications

Design & IP Development: Proven expertise in designing and optimizing custom digital circuits (e.g., standard cells, low-power cells) and analog/mixed-signal IP (e.g., regulators, oscillators, sensors) with a strict focus on PPA, reliability, and yield.
Methodology & Analysis: Strong background in circuit-level analysis (SPICE, PVT, Monte Carlo, variation) and standard-cell modeling (Liberty, CCS/ECSM, LVF) using industry-standard EDA tools from Cadence, Synopsys, or Siemens.
Physical & Process Implementation: First-hand experience with advanced nodes (FinFET/GAA) and physical implementation flows, including custom layout, parasitic extraction, DRC/LVS, and reliability analysis (EM/IR).
Silicon Lifecycle & Leadership: Demonstrated ability to lead technical reviews, influence ASIC architecture, and get results through silicon bring-up, failure analysis, and model-to-silicon correlation.
Proficiency in automation and scripting (Python, Tcl, or shell) to enhance engineering productivity.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

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