1,000+ matching jobs for “System Design Engineer”

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Jabil

Lead FPGA Design Engineer

Austin, Texas, United States

The FPGA Lead Engineer is responsible for leading FPGA design, development, integration, and debug activities for complex server, …

Added Oct 28, 2026

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Analog Devices

Staff Design Evaluation Engineer

Bengaluru, Karnataka, India

Design and develop innovative, reliable, and efficient bench hardware and software solutions for complex digital …

Added Nov 3, 2026

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RTX

… missiles/effectors, radars, and electronic warfare systems. The team leverages digital, analog, and power design skills to provide support throughout the product lifecycle from architecture and design through production …

Added Oct 27, 2026

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RTX

Senior FPGA Design Engineer

McKinney, Texas, United States

Added Oct 27, 2026

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Intel

Chassis IP Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

The Role and Impact As an IP Logic Design Engineer, you will be instrumental in developing and optimizing logic designs for high-performance IP …

Added Oct 27, 2026

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Nvidia

Senior Thermal Design Engineer

Santa Clara, California, United States

We are looking for a highly motivated Senior Thermal Product Design Engineer to join this dynamic and innovative team to support the next generation of products and thermal …

Added Oct 27, 2026

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Cisco Systems

Senior Design Verification Engineer

Belgrade, Central Serbia, Serbia

… stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development …

Added Oct 27, 2026

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Analog Devices

Power IC Design Engineer

Pudong, Shanghai, China

As a Staff Power IC Design Engineer in ADI's Shanghai design center, you will develop high-performance power management circuit blocks …

Added Nov 3, 2026

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Jabil

Sr. Electrical Design Engineer

Salt Lake City/Grantsville, UT

… affect project timelines. ESSENTIAL DUTIES AND RESPONSIBILITIES Develops and validates embedded hardware design applications of a complex nature. Independently develops embedded hardware design for Mechanical large form …

Added Oct 28, 2026

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RTX

Senior FPGA Design Engineer

Tucson, Arizona, United States

… a safer, more secure world. Join us and help shape the future of aerospace and defense. As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device families including: Xilinx, Altera, …

Added Oct 27, 2026

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RTX

Senior FPGA Design Engineer

Tewksbury, Massachusetts, United States

Added Oct 27, 2026

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State Street

System Integration Engineer, Vice President

Quincy, Massachusetts, United States +1 location

Full time

Pay posted by employer$110,000–$188,750

System Integration Engineer, Vice President Legal Technology Integrations Who We Are Looking For We are seeking a …

Added Oct 27, 2026

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RTX

Principal FPGA Design Engineer

US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A

Added Oct 27, 2026

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RTX

FPGA Design Engineer II

Tucson, Arizona, United States

… threat. Our team solves tough, meaningful problems that create a safer, more secure world. As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device families including: Xilinx, …

Added Oct 27, 2026

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Jabil

Senior Design Electrical Engineer

Austin, Texas, United States

The Electrical Engineer is responsible for supporting the design, development, integration, and validation of electrical subsystems …

Added Oct 28, 2026

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Caterpillar

Design Engineer- Package Integration

Lafayette, Indiana, United States

… reliable and compliant solutions that help solve our customers’ toughest challenges Job Summary This key Design Engineer role is in the Large Power Systems Division Core Packaging group. As a Design Engineer, you will …

Added Oct 27, 2026

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Senior ASIC Design Engineer

Vancouver, Washington, United States

Full time
Reg Employee

Pay posted by employer$116,150–$182,400 USD per year

Lead functional blocks and/or subsystems of digital ASICs from design to silicon verification. This includes RTL coding, verification, silicon validation, and qualification. …

Added Oct 12, 2026

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Carrier Global

Engineering leadership program-System Engineer

LOC3254: No.3239 Shenjiang Road, Shanghai, Pudong New Area, Shanghai, China

… products and services. As part of this transformation, we are hiring and empowering a recently graduated system engineer to help us innovate and pursue sustainable solutions for our customers. Key Responsibilities …

Added Oct 27, 2026

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Hewlett Packard Enterprise

Principal ASIC Design Engineer

Sunnyvale, California, United States

Pay posted by employer$181,000–$367,000 USD per year

… develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical …

Added Nov 3, 2026

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KLA

Sr. Mechanical Design Engineer

Milpitas, California, United States

Full time
Regular

Pay posted by employer$141,300–$240,200 per year

… by delivering high-impact work across your area of expertise. We are seeking a skilled Mechanical Design Engineer to lead the design and development of precision mechanical systems for advanced semiconductor …

Added Oct 15, 2026

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Senior ASIC Design Engineer

Vancouver, Washington, United States

Full time
Reg Employee

Pay posted by employer$116,150–$182,400 USD per year

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About this opportunity

Original employer description

Senior ASIC Design Engineer

Description -

HP is the world’s leading printing company. We are looking for innovators who are ready to make a purposeful impact. You will be a member of the R&D digital Application-Specific Integrated Circuit (ASIC) design team that develops the main controller with critical HP proprietary intellectual property that separates HP printers from the rest of the competitions. You will work with internal and external partners to deliver industry-leading embedded solutions for future HP printers.

Our new Vancouver, Washington site expands HP's presence in the Pacific Northwest and serves as a hub for engineering innovation and product development. This location brings together talented engineers working on next-generation technologies that power HP's industry-leading print and imaging solutions. As part of our Imaging & Print organization, you'll help develop advanced imaging capabilities that enhance performance, quality, and customer experiences across HP's enterprise product portfolio.

Responsibilities:

Lead functional blocks and/or subsystems of digital ASICs from design to silicon verification. This includes RTL coding, verification, silicon validation, and qualification.
Proactively work with other team members and partners to align on specifications, drive reviews, and complete documentation.
Manage and expand relationships with internal and external development partners.
Be a key contributor to ASIC roadmaps and future innovation.
Lead cross-discipline task force to triage product HW & FW integration issues to deliver robust solutions.
Contribute to key areas of Inkjet and Laserjet print architecture and data path requirements.
Be a key contributor to co-development activities to help prototype ASIC designs in FPGA or other software models to support pre-silicon firmware development and verification.
Drive design methodology and tool automation work as needed.

Education and Experience Required:

BS or MS degree in electrical engineering or equivalent with focus on VLSI design experience
8 -10 years of ASIC or SOC design and development experience

Knowledge and Skills:

Deep knowledge of submicron semiconductor technology.
Deep knowledge of embedded system design, verification, and product development lifecycle.
Very familiar with digital ASIC/SOC design flow from RTL to silicon characterization
Very familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc.
Very familiar with design and programming languages: Verilog, SV, Python, Perl, C, C++, etc.
Very familiar with code base management method including subversion, git, GitHub, etc.
Excellent analytical and problem-solving skills.
Excellent written and verbal communication skills, ability to negotiate design features and options
Working knowledge of electronic components, PCA designs and use of test equipment

Deep knowledge and domain know-hows in one or more areas below is a big plus.

Laserjet printing technology
ARM microprocessor subsystem
Memory and storage subsystem (DDR, Flash, eMMC, etc.)
Design database management, scripting and other design flow automation
Proficiency in applying AI Copilot (LLM-based tools) to accelerate ASIC design, verification, and engineering productivity.

The pay range for this role is $116,150 to $182,400 USD annually with additional opportunities for pay in the form of bonus and/or equity (applies to United States of America candidates only). Pay varies by work location, job-related knowledge, skills, and experience.

Benefits:

HP offers a comprehensive benefits package for this position, including:

Health insurance
Dental insurance
Vision insurance
Long term/short term disability insurance
Employee assistance program
Flexible spending account
Life insurance
Generous time off policies, including;
4-12 weeks fully paid parental leave based on tenure
11 paid holidays
Additional flexible paid vacation and sick leave (US benefits overview)

The compensation and benefits information is accurate as of the date of this posting. The Company reserves the right to modify this information at any time, with or without notice, subject to applicable law.

Job -

Engineering

Schedule -

Full time

Shift -

No shift premium (United States of America)

Travel -

Relocation -

Yes

Equal Opportunity Employer (EEO) -

HP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s).

Please be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence.

For more information, review HP’s EEO Policy or read about your rights as an applicant under the law here: “Know Your Rights: Workplace Discrimination is Illegal"

Why this result? · Employer labels

Keywords also found in description

Engineering
Full time
Reg Employee

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