137 matching jobs for “Senior Chip Design Verification Engineer”

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Nvidia

Senior ASIC Design Engineer - Agentic AI

Santa Clara, California, United States +2 locations

NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement the world's leading SoC's and GPU's. …

Added Oct 31, 2026

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Cisco Systems

Senior Physical Design Engineer - Signoff Methodology

Armenia

… role with four days per week at Cisco’s Yerevan office. Meet the Team You'll be joining our CAD Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development …

Added Oct 27, 2026

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KLA

Mechanical Design Engineer

Migdal Ha‘Emeq, Northern District, Israel

Full time
Regular

… devices to volume production quickly and cost-effectively. Enabling the movement towards advanced chip design, KLA's Global Products Group (GPG), which is responsible for creating all of KLA’s metrology and …

Added Oct 15, 2026

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Nvidia

Senior Logic Design Engineer, Cache Coherent Interconnects

Santa Clara, California, United States +1 location

We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of …

Added Oct 31, 2026

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Nvidia

ASIC Physical Design Engineer

China, Shanghai

ASIC-PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal …

Added Oct 27, 2026

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KLA

System Design Engineer

Milpitas, California, United States

Full time
Regular

Pay posted by employer$136,300–$231,700 per year

Added Oct 15, 2026

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Nvidia

CPU Design Methodology Engineer

Hillsboro, Oregon, United States +3 locations

We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development has greatly increased over the years. …

Added Oct 27, 2026

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Cisco Systems

ASIC Physical Design Engineer

Caesarea, Israel

Cisco Silicon One is seeking a Physical Design Engineer. Meet the Team The Physical Design team within Cisco Silicon One owns backend methodology and flow …

Added Oct 27, 2026

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KLA

System Design Engineer

Milpitas, California, United States

Full time
Regular

Pay posted by employer$136,300–$231,700 per year

Added Oct 15, 2026

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Cisco Systems

Senior Physical Design CAD

Caesarea, Israel +1 location

Silicon One is seeking a CAD Engineer to join the Cisco Silicon One Physical Design team. Meet the Team You'll be part of the Cisco Silicon One …

Added Oct 27, 2026

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Boeing

ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis and Timing) – (Experienced, Lead, or Senior)

USA - Mountain View, CA

In person
Full time
Regular

Pay posted by employer$119,850–$162,150

. You will work on leading‑edge ASICs used in space and aerospace systems—driving architecture, verification, tapeout readiness, silicon debug, and cross‑discipline integration with architecture, RTL, verification, …

Added Oct 12, 2026

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Intel

Senior EDA Design Automation Engineer - Digital Implementation

Malaysia, Penang

The Role and Impact We are seeking an EDA Tools Hardware Engineer to develop and enhance cutting-edge engineering design automation tools, methodologies, and workflows. In …

Added Oct 27, 2026

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RTX

Principal RF Design Engineer

Huntsville, Alabama, United States

… that align product capabilities to the needs of our customer. We will empower our people to leverage design commonality and innovation, balancing risk and rigor, to achieve predictable and affordable solutions. We …

Added Oct 27, 2026

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Cisco Systems

ASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |8-12 years| Pune)

Pune, Maharashtra, India

… transceivers, and platforms that power Cisco's core data center networking solutions. We specialize in the design and integration of cutting-edge IM/DD optics and silicon photonic platforms that enable customers to deploy …

Added Oct 27, 2026

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Nvidia

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

Santa Clara, California, United States +1 location

As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level …

Added Oct 27, 2026

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KLA

Sr. System Design Engineer (DUV, VUV plasma sources)

Milpitas, California, United States

Full time
Regular

Pay posted by employer$186,200–$273,067 per year

… priorities by delivering high-impact work across your area of expertise. Responsibilities: The Sr. System Design Engineer will have a lead role in next generation product development, from technology evaluation and …

Added Oct 15, 2026

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Cisco Systems

Senior Asic Design - Cisco Silicon One

Caesarea, Israel

Meet the Team Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: …

Added Oct 27, 2026

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KLA

Sr. Electrical Design Engineer (Firmware, DSP, Image Alignment)

Milpitas, California, United States

Full time
Regular

Pay posted by employer$141,300–$207,233 per year

… by delivering high-impact work across your area of expertise. We are looking for a Sr. Electrical Design Engineer to join our team in Milpitas! In this hands-on role, you will develop embedded firmware and …

Added Oct 15, 2026

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KLA

Electrical Design Engineer (R&D)

Singapore, Singapore

Full time
Regular

Added Oct 15, 2026

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Boeing

Experienced or Senior Digital Circuit Card Assembly (CCA) Design Engineer

USA - Huntsville, AL

In person

Pay posted by employer$112,200–$151,800

Focus on electrical design, simulation, verification, and validation testing of high-speed printed circuit board design and electronic …

Added Oct 12, 2026

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Nvidia

Senior ASIC Design Engineer - Agentic AI

Santa Clara, California, United States +2 more

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About this opportunity

Original employer description

NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement the world's leading SoC's and GPU's. As part of NVIDIA's "AI for chip design" team, you will have the opportunity to tap into the unlimited potential of AI and change the landscape of chip design at NVIDIA and throughout the industry. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. Our team operates at the intersection of research, engineering, and product development, transforming innovative ideas and research breakthroughs into real-world solutions. If you're passionate about the latest research and cutting-edge technologies shaping generative AI, this role and team offer a great opportunity to be at the forefront of innovation.

What you'll be doing:

As a member of the GPU Design Methodology team, you will document and deliver design guidelines that will help the ASIC team implement high performance, area and power efficient RTL to achieve design targets and specifications.
As part of the AI for Chip Design team, you will develop agentic AI solutions to craft the micro-architecture, implement the RTL, and deliver a fully verified, synthesis/timing clean design.
Collaborate and coordinate with other designers as well as tool and flow owners to make sure design guidelines and agentic solutions meet their requirements.
Make a difference by using AI technologies to tackle complex problems in chip design, driving innovation and meaningful impact across the industry.
Drive impact by designing and deploying LLM-powered solutions for engineering assistants and multi-turn, multi-modal dialogue systems.
Stay ahead by engaging with the latest advancements in machine learning and AI to create powerful solutions.

What we need to see:

Master's or PhD degree in Electrical Engineering, Computer Science/Engineering, or a related field (or equivalent experience).
8+ years of meaningful work experience.
Experience in micro-architecture and RTL development (Verilog) in complex designs.
Deep understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.
Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is required.
Proficiency in rapid prototyping using Python with strong foundational knowledge of data structures, algorithms, and software engineering principles.
Experience with fine-tuning large language models, building advanced multi-agent systems, RAG pipelines and vector databases.
Strong analytical, communication, and interpersonal skills, with a proven track record to thrive in dynamic, product-focused, and distributed teams.
A proactive approach to problem-solving and a willingness to acquire new skills and knowledge as needed to achieve results.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking people in the world working for us. We inspire our engineers to build solutions for the problems faced by our customers. Are you creative? Do you love the challenge of continuously crafting the fastest, most efficient GPUs while driving innovation across multiple fields? If so, we want to hear from you.

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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