125 matching jobs for “Senior Chip Design Verification Engineer”

How results work

Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Nvidia

Senior Chip Design Verification Engineer

Israel, Yokneam +1 location

We are now looking for a Chip Design Verification Engineer. NVIDIA is seeking a verification engineer to join the chip design …

Added Oct 29, 2026

Save job

Nvidia

Senior Chip Design Verification Engineer

Israel, Beer Sheva +1 location

NVIDIA is looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's …

Added Oct 27, 2026

Save job

Nvidia

Senior Chip Design Verification Engineer

Israel, Yokneam +1 location

NVIDIA's Chip Design group is looking for best-in-class Verification Engineers to join our outstanding Silicon …

Added Oct 27, 2026

Save job

Nvidia

Senior Verification Engineer, Chip Design

Israel, Yokneam

We are looking for a talented, fast learner, and highly motivated Chip Design – Verification Engineer. As a member of our Chip Design Team, you will be responsible for verifying …

Added Oct 27, 2026

Save job

Nvidia

Senior Chip Design Verification Engineer

Israel, Tel Aviv

NVIDIA is looking for a best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the …

Added Oct 27, 2026

Save job

Nvidia

Senior Chip Design Verification Engineer

Israel, Tel Aviv +1 location

NVIDIA is looking for best-in-class Chip Verification Engineers to join our outstanding Networking Silicon Engineering team, developing the …

Added Oct 27, 2026

Save job

Nvidia

Senior Chip Design Engineer

Israel, Beer Sheva

NVIDIA is looking for a Senior Chip Design Engineer to join our Network Adapter Silicon group. As a Senior Design Engineer at NVIDIA …

Added Oct 27, 2026

Save job

Cisco Systems

Senior Design Verification Engineer

Belgrade, Serbia

Meet the Team Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. …

Added Oct 27, 2026

Save job

Intel

Design Verification Engineer

US, California, Santa Clara

Pay posted by employer$105,650–$149,150 USD per year

About Intel & Silicon Chassis Intel is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to the verification …

Added Oct 27, 2026

Save job

Cisco Systems

Senior ASIC Design Verification Engineer

San Jose, California, United States

Pay posted by employer$167,700–$245,200

… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …

Added Oct 27, 2026

Save job

Intel

Senior Design Verification Engineer - Neuromorphic Computing

US, Oregon, Hillsboro +4 locations

Pay posted by employer$122,440–$232,190 USD per year

… the versatility demanded by modern AI workloads. Position Overview We are seeking experienced pre-silicon verification engineers who are passionate about driving innovation at the intersection of advanced semiconductor …

Added Oct 27, 2026

Save job

GE Aerospace

Staff Engineer - FPGA Design/Verification

Grand Rapids, Michigan, United States +2 locations

Full time
Regular

Summary GE Aerospace is seeking an experienced Staff Engineer – FPGA Design/Verification to lead the development of custom logic for advanced avionics hardware. This …

Added Oct 27, 2026

Save job

Intel

Senior Verification Engineer

Ireland, Leixlip

The Role and Impact You will be part of a highly skilled, agile design/verification team developing cutting-edge hardware for the NIC, IPU and AI domains. As a senior IP Design …

Added Oct 27, 2026

Save job

Nvidia

Senior Full Chip Layout Engineer

Israel, Yokneam +1 location

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best …

Added Oct 27, 2026

Save job

Nvidia

Senior Physical Verification Engineer

Israel, Tel Aviv +1 location

… debug, and the ability to scale best practices across multiple programs. This is a great match for an engineer who wants to combine technical depth with broad project impact. What you’ll be doing: Own physical …

Added Oct 27, 2026

Save job

RTX

Sr Electrical Engineer – Design Verification - FPGA/ASIC (Onsite)

Cedar Rapids, Iowa, United States

Develop verification plans based on requirements capture, decomposition, and traceability. Architect and implement advanced …

Added Oct 27, 2026

Save job

Nvidia

Senior DFT Verification Engineer

Israel, Yokneam +1 location

NVIDIA is looking for an experienced DFT Design Engineer to join the DFT design team and develop the next generation DFT technologies. As a design engineer …

Added Oct 27, 2026

Save job

Nvidia

Senior Physical Verification Engineer

India, Bengaluru

NVIDIA is seeking passionate, highly motivated, and creative design engineers to be part of a team working on industry-leading GPUs and SOCs. This position offers the …

Added Oct 27, 2026

Save job

Intel

Senior ASIC Verification Engineer

Israel, Haifa

… fast adopters of AI as a working tool. We bring modern AI assistants and automation into every part of the verification flow — planning, stimulus and checker development, coverage analysis, debug and more — and we look to our …

Added Oct 27, 2026

Save job

Nvidia

Senior ASIC Verification Engineer

US, CA, Santa Clara

NVIDIA is actively searching for talented Senior Verification Engineers to ensure the integrity and excellence of our industry-leading SoCs and GPUs. …

Added Oct 27, 2026

Save job

Intel

Senior Design Verification Engineer - Neuromorphic Computing

US, Oregon, Hillsboro +4 more

Pay posted by employer$122,440–$232,190 USD per year

View job

Save job

Qualifications · employer excerpt

Minimum qualifications• Bachelors and 5+ years OR Masters and 3+ years of silicon engineering experience.• 3+ years of pre-silicon verification or post-silicon validation experience in SoC accelerators or custom ASIC designs.• 3+ years of…

About this opportunity

Original employer description

Job Details:

Job Description:

The Opportunity
For nearly a decade, Intel's Neuromorphic Computing Lab-together with a global ecosystem of 250+ research groups-has explored architectures, algorithms, and software inspired by the brain's extraordinary efficiency, scalability, and adaptability. Our Loihi series of research chips pioneered event-driven, sparse, and massively parallel neuro-inspired processing, fueling over 100 peer-reviewed publications that validate the promise of this novel approach.

Now, we're entering an exciting new chapter: transforming these breakthroughs into real-world products that will power the coming era of physical AI systems-beyond the reach of GPUs and mainstream AI accelerators.

If you are passionate about pushing the boundaries of computing, from transistor-level innovation to software abstractions, join us. Help define the next wave of AI technology that harnesses the proven advantages of Intel's neuromorphic computing technology with the versatility demanded by modern AI workloads.

Position Overview
We are seeking experienced pre-silicon verification engineers who are passionate about driving innovation at the intersection of advanced semiconductor technologies, physical AI and next-generation computing architectures. As a member of Intel's neuromorphic silicon team, you will develop and scale verification methodologies spanning software, RTL, and emulation platforms to validate these novel architectures.

This role requires a full-stack verification mindset. You will create application-driven workloads using high-level software APIs while also developing robust HDL-based verification environments that ensure correctness at the lowest levels of hardware implementation. Working closely with architecture, design, and software teams, you will help drive verification strategies that enable first-pass silicon success.

An openness to learning new technologies and methodologies, such as asynchronous design techniques and AI-driven verification automation, is essential.

Responsibilities
• Mapping application-level requirements to unit- and system-level test plans.
• Write Python-based directed and random tests for design partitions and chip-level.
• Running regressions, debugging test failures, tracking coverage and working with designers to fix failures and improve coverage.
• Maintaining assertions, scoreboards and any tools/flows that are developed.
• Integrating VIPs and coordinating with IP teams to ensure protocol requirements are met.

Qualifications:

Minimum qualifications
• Bachelors and 5+ years OR Masters and 3+ years of silicon engineering experience.
• 3+ years of pre-silicon verification or post-silicon validation experience in SoC accelerators or custom ASIC designs.
• 3+ years of experience in UVM and constrained random verification methods.
• 2+ years of experience developing the entire verification stack from test planning to execution, e.g. covering test development, coverage tracking, emulation, and post-silicon.
• 1+ year of experience using AI tools for test generation, debugging and improving overall productivity.

Preferred qualifications
• Experienced in neuromorphic computing or AI/ML accelerator design.
• Experience with commercial Verification IPs for standard IO interfaces, PHYs, and protocols such as Ethernet, PCIE, MACsec/IPsec, RoCEv2, MIPI CSI-2, JESD204.
• Experience with DFX, low power and UPF verification techniques.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, Austin

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Why this result? · Employer labels

Keywords also found in description

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.