137 matching jobs for “Senior Chip Design Verification Engineer”

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Nvidia

Senior ASIC Verification Engineer

Santa Clara, California, United States

NVIDIA is actively searching for talented Senior Verification Engineers to ensure the integrity and excellence of our industry-leading SoCs and GPUs. …

Added Oct 27, 2026

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Nvidia

Senior Formal Verification Engineer

Israel, Tel Aviv

We are looking for a Formal Verification Engineer for our NVIDIA Networking team! This is an exciting opportunity to join a hardworking Pre-Silicon …

Added Oct 27, 2026

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Nvidia

Senior Full-Chip RTL Integration Engineer

Santa Clara, California, United States +1 location

… of new process technology adoption by joining NVIDIA's Advanced Technology Group! We are looking for a Full-Chip RTL Integration Engineer to join our dynamic and growing FE-ASIC development team. In this role, you will …

Added Oct 27, 2026

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Nvidia

Senior ASIC Verification Engineer

Austin, Texas, United States

… the world. This is our life’s work, to amplify human inventiveness and intelligence. The NVIDIA System-On-Chip (SOC) group is looking for an experienced ASIC Verification Engineer! In this position you will have the …

Added Oct 27, 2026

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Nvidia

Senior ASIC Verification Engineer - GPU

Santa Clara, California, United States

At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification …

Added Oct 27, 2026

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Nvidia

Senior Firmware PHY Verification Engineer

Israel, Tel Aviv

NVIDIA is looking for an excellent Senior Firmware Verification Engineer for NVIDIA FW PHY verification Group. The person will be part of FW PHY …

Added Oct 27, 2026

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Nvidia

Senior Verification Engineer, Switch SoC

Bengaluru, Karnataka, India

We are currently seeking Verification Engineer with strong verification fundamentals to work in Switch Silicon group. You'll join a group of …

Added Oct 27, 2026

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Nvidia

Senior CPU Design Engineer

Hillsboro, Oregon, United States +5 locations

We are looking for a Senior CPU Design Engineer! NVIDIA is seeking best-in-class CPU Design Engineers to design the world’s leading …

Added Oct 31, 2026

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Nvidia

Senior Digital Design Engineer

Santa Clara, California, United States +2 locations

We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role, you will join a group …

Added Oct 31, 2026

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Nvidia

Senior Firmware Verification and Bringup Engineer

Santa Clara, California, United States

We are now looking for a Senior Firmware Verification and Bringup Engineer to join our Memory Subsystem Team! Widely considered to be one …

Added Oct 27, 2026

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Nvidia

Senior Physical Design Engineer

Westford, Massachusetts, United States

… join the team and see how you can make a lasting impact on the world. NVIDIA is looking for best-in-class Senior Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the …

Added Oct 27, 2026

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Nvidia

Senior Physical Design Engineer

Santa Clara, California, United States +1 location

We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the …

Added Oct 27, 2026

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Nvidia

Senior ASIC Design Engineer

Santa Clara, California, United States +1 location

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two …

Added Oct 27, 2026

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Cisco Systems

Senior RTL Design Engineer

Armenia

… groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical Design …

Added Oct 27, 2026

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RTX

Senior Hardware Design Engineer

Tewksbury, Massachusetts, United States +1 location

… The Receiver, Exciter & Processing Architecture (REPA) Department has an opportunity for an Electrical Engineer who is seeking to use their strong academic background and professional experience in digital/analog …

Added Oct 27, 2026

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Intel

Senior Analog Design Engineer

Santa Clara, California, United States

Pay posted by employer$122,440–$232,190 USD per year

… and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something …

Added Oct 27, 2026

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Intel

Senior Analog Design Engineer

Santa Clara, California, United States

Pay posted by employer$141,910–$269,100 USD per year

Added Oct 27, 2026

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Nvidia

Senior Circuit Design Engineer

Santa Clara, California, United States

We are now looking for a Senior Circuit Design Engineer! NVIDIA stands at the intersection of hardware excellence and AI breakthrough, …

Added Oct 27, 2026

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Nvidia

Senior Circuit Design Engineer

Santa Clara, California, United States

We are now looking for a Senior Circuit Design Engineer! NVIDIA stands at the intersection of hardware excellence and AI breakthrough, …

Added Oct 27, 2026

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Cisco Systems

Senior RTL Design Engineer

Armenia

… the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and …

Added Oct 27, 2026

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Intel

Senior Analog Design Engineer

Santa Clara, California, United States

Pay posted by employer$122,440–$232,190 USD per year

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Qualifications · employer excerpt

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.…
Minimum Qualifications: M.S. degree in Electrical Engineering or a related field with 3+ years of industry experience or PhD & 0 years in the following:
Hands-on experience designing high-speed circuit blocks such as amplifiers, drivers, equalizers, PLLs, phase interpolators, and clock and data recovery (CDR) circuits for data rates of 32 Gbps and above.
Experience designing inductors, transmission lines, transimpedance amplifiers (TIAs), and optical modulator drivers.
Strong expertise in high-speed serial link design and analog CMOS/BiCMOS circuit design using deep-submicron process technologies.

1 more in the full description below.

About this opportunity

Original employer description

Job Details:

Job Description:

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

Business group

Intel Integrated Photonics Solutions (IPS), part of the Data Center Group, is a leader in silicon photonics integration. Our team drives innovation through advanced technology and scalable, high-volume manufacturing of silicon photonics products. We are committed to developing next-generation optical connectivity solutions that enable continued data center bandwidth growth through smaller form factors, co-packaged optics, and data rates scaling from 400G today to 3.2T and beyond.

The Role and Impact

We are seeking a highly motivated Senior Analog Design Engineer to join our growing team and help accelerate the development of industry-leading silicon photonics solutions. As a Senior Analog Design Engineer, you will contribute to the Silicon Photonics Solutions Group's mission of transforming data center connectivity and strengthening Intel's leadership in networking technologies.

In this role, you will be responsible for:

The architecture, design, implementation, and validation of high-speed analog and mixed-signal integrated circuits used in advanced optical interconnect products.
You will collaborate closely with cross-functional design teams to deliver innovative solutions from concept through production.
Define circuit architectures and develop designs that meet power, performance, and functionality requirements for next-generation optical interconnects.
Lead block-level design and collaborate with multidisciplinary teams to deliver key integrated circuit components.
Architect, design, and validate high-speed, low-voltage, low-power analog and mixed-signal integrated circuits.
Work closely with digital design teams to ensure successful integration and product execution.
Plan and execute design activities while balancing performance, schedule, and quality objectives.
Guide to the development of post-silicon test and characterization plans.
Create and maintain comprehensive design documentation, including design specifications, reviews, and technical reports.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:
M.S. degree in Electrical Engineering or a related field with 3+ years of industry experience or PhD & 0 years in the following:

Hands-on experience designing high-speed circuit blocks such as amplifiers, drivers, equalizers, PLLs, phase interpolators, and clock and data recovery (CDR) circuits for data rates of 32 Gbps and above.
Experience designing inductors, transmission lines, transimpedance amplifiers (TIAs), and optical modulator drivers.
Strong expertise in high-speed serial link design and analog CMOS/BiCMOS circuit design using deep-submicron process technologies.
Experience with full-chip integration, ESD design considerations, and verification methodologies.

Preferred Qualifications:

Familiarity with optical communication systems.
Experience developing 400G, 800G, and 1.6T optical links.
Experience with package design and test setup development.
Experience designing precision analog circuits such as ADCs and DACs.
Experience with PAM4 and NRZ link architectures.
Strong understanding of mixed-signal design methodologies and flows.
Excellent written and verbal communication skills.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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