1,000+ matching jobs for “Physical Design Engineer”

How results work

Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Nvidia

Senior SOC Design Engineer

US, CA, Santa Clara

NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build …

Added Oct 27, 2026

Save job

Intel

… employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, …

Added Oct 27, 2026

Save job

Nvidia

CPU Design Methodology Engineer

US, OR, Hillsboro +3 locations

We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development has greatly increased over the years. We are now …

Added Oct 27, 2026

Save job

Nvidia

Senior Chip Design Engineer

Israel, Beer Sheva

NVIDIA is looking for a Senior Chip Design Engineer to join our Network Adapter Silicon group. As a Senior Design Engineer at NVIDIA Networking …

Added Oct 27, 2026

Save job

Cisco Systems

Senior RTL Design Engineer

Armenia

… groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical Design …

Added Oct 27, 2026

Save job

Intel

Quantum Interposer Design Engineer

US, Oregon, Hillsboro

Pay posted by employer$141,910–$200,340 USD per year

… partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Interposer Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for …

Added Oct 27, 2026

Save job

Nvidia

Senior Firmware Design Engineer

Israel, Yokneam

NVIDIA is looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW development, architecture, …

Added Oct 27, 2026

Save job

Nvidia

Package Design Methodology Engineer

US, CA, Santa Clara +2 locations

… on the world. NVIDIA's Advanced Package Engineering team sits at the intersection of cutting-edge chip design and the physical reality of getting silicon to product — and we're expanding it. As AI systems grow more …

Added Oct 27, 2026

Save job

Intel

Platform Hardware Design Engineer

PRC, Shanghai

… accelerators, and infrastructure processing platforms. We are looking for a high-potential hardware engineer to help bring next-generation data center technologies to market while building a rewarding career. You …

Added Oct 27, 2026

Save job

Intel

Senior Hardware Design Engineer

Petaẖ Tiqva, Israel

… product lines. We propose a dynamic and flexible workplace position, working directly with highly capable design, system, and pre/post-silicon teams within the organization. Most of the team's engineers have 10+ years …

Added Oct 27, 2026

Save job

Broadcom

I/O Design Engineer

Yishun New Town, Singapore

Full time
Regular

Role Overview Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design …

Added Oct 5, 2026

Save job

Broadcom

Foundation IP Design Engineer

Yishun New Town, Singapore

Full time
Regular

We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the …

Added Oct 5, 2026

Save job

Broadcom

Foundation IP Design Engineer

Yishun New Town, Singapore

Full time
Regular

We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the …

Added Oct 5, 2026

Save job

Intel

GPU Design Verification Engineer

India, Bangalore

The Role and Impact: We are looking for a GPU Design Verification Engineer to ensure the functional accuracy of cutting-edge graphics logic components, …

Added Oct 27, 2026

Save job

Palo Alto Networks

Senior ASIC Design Engineer

Office - USA - CA - Headquarters

… and help deliver the digital logic that powers our next-generation firewall platforms. You will own module design from specification through silicon bring-up, working with world-class verification and physical-design …

Added Oct 27, 2026

Save job

Broadcom

Lead ASIC Design Engineer

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

We are seeking a hands-on Principal Digital Design Engineer to serve as the Chip Lead for our next-generation silicon projects. In this high-impact role, you …

Added Oct 5, 2026

Save job

Intel

Platform Hardware Design Engineer

Malaysia, Penang

… from architecture definition through board bring-up, validation, and debug. Responsible for leading the design and development of high-speed printed circuit boards (PCB), subsystems, and platform solutions while …

Added Oct 27, 2026

Save job

Intel

Analog Circuit Design Engineer

India, Bangalore

The Role and Impact: As an Analog Circuit Design Engineer, you will lead the design and development of high-speed analog circuits for advanced process …

Added Oct 27, 2026

Save job

Product Design Engineer - HPIQ

San Francisco, California, United States

Full time
Reg Employee

Pay posted by employer$107,400–$155,700

As a Product Design Engineer at HP IQ, you’ll work at the intersection of creativity, engineering, and design to develop …

Added Oct 12, 2026

Save job

Intel

Silicon Packaging Design Engineer

India, Bangalore

Join our team as a Silicon Packaging Design Engineer in the Data Center Group, where you will play a pivotal role in crafting cutting-edge silicon …

Added Oct 27, 2026

Save job

Intel

Senior Hardware Design Engineer

Petaẖ Tiqva, Israel

View job

Save job

About this opportunity

Original employer description

Job Details:

Job Description:

Intel Central Engineering Group (CEG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing devices. CEG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers. You will be exposed to High-Speed I/O protocols such as PCIeGen6-7, DDR5-6, and PAM4 Ethernet 224Gb, which are a part of our Ethernet Infrastructure Processing Unit (Intel IPU) and Foundation NIC (FNIC) Ethernet product lines. We propose a dynamic and flexible workplace position, working directly with highly capable design, system, and pre/post-silicon teams within the organization. Most of the team's engineers have 10+ years of experience, and we are looking for a highly skilled multidisciplinary engineer with proven experience in electrical and system engineering to lead the hardware design of our next division projects' challenges and be part of Ethernet networking's accelerated growth. The role requires high-frequency signal and power integrity and a good understanding of RF circuits and electromagnetic wave propagation. It includes learning the specifications of each interface and the required design limitations that should be verified. You will lead a team of developers and develop yourself digital and analog circuit boards for use in HW-Engineering products. In this position, your responsibilities include but are not limited to developing board design from schematic through leading the Silicon power-on hardware enablement and debug and may interface with other board design and test module development teams to drive innovation initiatives. You would also be responsible for identifying/qualifying new hardware solutions; providing technical leadership to working groups/task forces to resolve hardware, schematics, layout, and DFx issues through debugging and reviews; and part/component selection management.

Qualifications:

Required Skills and Experience - B.Sc./M.Sc. Electrical Engineer with over 10 years of relevant experience - Proven design experience in the semiconductor ASIC development industry is a MUST - Proven planning and design-flows buildup - Proven experience with PCB technology and layout technics (Analog and Digital) including stack-up, placement, routing, and advance SI/PI consideration - Knowledge of signal integrity, transmission line theory, analog circuits, and high-speed signal processing - FPGA and Verilog coding skills - Excellent debugging skills, ability to analyze problems, diagnose the root cause and apply corrective actions - Lab hands-on experience in high-speed, low-speed, and clocks circuitry signal measurements - Experience with debugging at circuit board-level problems in analog and digital domains using lab test equipment - Operating test equipment such as high-end Oscilloscopes, VNA, TDR, BERT's, etc. - Programming skills in one or more language such C++/python/MATLAB - Working experience with AI-based tools - Ability to work as a team player and contribute in a cross-functional product team on a daily basis - Strong verbal and written communication skills in English for interacting with design, evaluation and production engineers; customers; technical marketing engineers; and program managers - Comprehensive understanding of system architecture

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location:

Israel, Petah-Tikva

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Why this result? · Employer labels

Keywords also found in description

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.