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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Glenrothes, Scotland, United Kingdom
… handover. Design for Excellence (DfX) : Champion Design for Manufacturability (DfM), Testability (DfT), and Cost (DfC) to ensure designs are robust and cost-effective. Risk Mitigation : Manage Manufacturing …
Bengaluru, Karnataka, India
We are seeking a highly experienced and motivated Senior Technical Lead - CPU Physical Design to lead the physical implementation of next-generation CPU IPs from …
Prince George, VA
… UL requirements where applicable, utility requirements, and customer-specific specifications. Serve as the senior MV electrical engineering representative for customer technical reviews, architecture discussions, issue …
Santa Clara, California, United States
… learn, and lead. Your Team, Your Impact Marvell is seeking a highly motivated and talented Principal Test Engineer to join its dynamic New Product Introduction (NPI) test engineering team. You will work on cutting-edge …
Singapore
… platform(s). Demonstrable experience in ATE testing (critical skill), test methodology, silicon process, DFT/DFM, and high-speed digital testing. Strong knowledge of C/C++, Perl, Python, and Linux environment. …
Singapore
… platform(s). Demonstrable experience in ATE testing (critical skill), test methodology, silicon process, DFT/DFM, and high-speed digital testing. Strong knowledge of C/C++, Perl, Python, and Linux environment. …
Phoenix, Arizona, United States
Pay posted by employer$180,770–$255,200 USD per year
Intel Corporation is seeking a high-impact Yield Development Engineer to drive yield performance for cutting-edge manufacturing processes within the Substrate Technology and …
East Hartford, Connecticut, United States
… Materials and Process Engineering (MPE) organization in East Hartford, CT is looking for a highly motivated Senior Principal Engineer- Materials and Process Modeling who can support the development and implementation of …
Santa Clara, California, United States
NVIDIA is now looking for a Senior Technical Program Manager to join our DFX engineering team and lead the software methodology programs that …
Santa Clara, California, United States +1 location
… technical interface to customers to define test strategy and resolve issues. Partner closely with design, DFT, product engineering, test engineering, operations, and quality teams. Test Strategy & Specification …
Milpitas, California, United States
Pay posted by employer$136,300–$231,700 per year
… the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. The Surfscan group includes a team of engineers, technology …
Warren, Michigan, United States +1 location
… electrification, central compute, and autonomous technologies. We are building a high-energy team of Senior DFx (Design for Manufacturing, Test, and Tooling) engineers to serve as the critical link between internal …
USA, Remote +1 location
Pay posted by employer$125,000–$208,400
… of clinical content and codes, as well as interface/integration technologies, including FHIR API, HL7, XML, DFT, and FHIR API Knowledge of SQL and Oracle Databases Understanding of Electronic Prescribing, Direct …
Bengaluru, Karnataka, India
… highly complex ASICs and SoCs. You will own the end-to-end test development lifecycle from pre-silicon DFT engagement to post-silicon bring-up and high-volume manufacturing (HVM) release. As a senior technical …
Santa Clara, California, United States
… strategy for semiconductor test. This covers wafer and package test operations from start to finish. This senior individual contributor role is central to our manufacturing and product engineering teams. You will lead …
Hillsboro, Oregon, United States +4 locations
Pay posted by employer$141,910–$269,100 USD per year
… technology with the versatility demanded by modern AI workloads. Position Overview We are seeking a senior product development engineer to lead the DFT/DFX strategy for Intel's neuromorphic silicon program. This …
Pune, Maharashtra, India +1 location
… expertise in high-speed optical interconnects and mastery of the complete ASIC/SoC design flow, including DFT, physical design, and verification. Furthermore, the position requires the ability to drive technical …
Santa Clara, California, United States +1 location
… in parallel computing, machine learning, and specialized algorithms for VLSI design. We are seeking a Senior P&R Methodology Architect to define and own the next generation RTL2GDS flow for advanced nodes (3nm and …
Pune, Maharashtra, India
… including AI/ML workloads, and next-generation data center architectures. Your Impact As a Verification Engineer, you will work with a diverse team of engineers spanning multiple disciplines. At the concept phase you …
Santa Clara, California, United States
Are you looking for a Digital Design Manager role? As a Senior Digital Design Manager in our Mixed-Signal High-Speed I/O SerDes group, you'll lead a team working on …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
