149 matching jobs for “Senior Chip Design Verification Engineer”

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Intel

Senior Verification Engineer

Ireland, Leixlip

The Role and Impact You will be part of a highly skilled, agile design/verification team developing cutting-edge hardware for the NIC, IPU and AI domains. As a senior IP Design …

Added Oct 27, 2026

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Nvidia

… next generation NIC and DPU products. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug. What you'll be doing: …

Added Oct 27, 2026

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Nvidia

Senior Full Chip Layout Engineer

Israel, Yokneam +1 location

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best …

Added Oct 27, 2026

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Nvidia

Senior ASIC Power Management Micro Architect, Chip Design

Israel, Yokneam +1 location

… accelerated computing, and power efficiency sits at the heart of everything we build. We are looking for a Senior ASIC Design Engineer to join our Chip Design team and take ownership of Power Management IP — from …

Added Oct 27, 2026

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Nvidia

Senior Physical Verification Engineer

Israel, Tel Aviv +1 location

… debug, and the ability to scale best practices across multiple programs. This is a great match for an engineer who wants to combine technical depth with broad project impact. What you’ll be doing: Own physical …

Added Oct 27, 2026

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RTX

Sr Electrical Engineer – Design Verification - FPGA/ASIC (Onsite)

Cedar Rapids, Iowa, United States

Develop verification plans based on requirements capture, decomposition, and traceability. Architect and implement advanced …

Added Oct 27, 2026

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Nvidia

Senior DFT Verification Engineer

Israel, Yokneam +1 location

NVIDIA is looking for an experienced DFT Design Engineer to join the DFT design team and develop the next generation DFT technologies. As a design engineer …

Added Oct 27, 2026

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Nvidia

Senior Physical Verification Engineer

India, Bengaluru

NVIDIA is seeking passionate, highly motivated, and creative design engineers to be part of a team working on industry-leading GPUs and SOCs. This position offers the …

Added Oct 27, 2026

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Intel

Senior ASIC Verification Engineer

Israel, Haifa

… fast adopters of AI as a working tool. We bring modern AI assistants and automation into every part of the verification flow — planning, stimulus and checker development, coverage analysis, debug and more — and we look to our …

Added Oct 27, 2026

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Nvidia

Senior ASIC Verification Engineer

US, CA, Santa Clara

NVIDIA is actively searching for talented Senior Verification Engineers to ensure the integrity and excellence of our industry-leading SoCs and GPUs. …

Added Oct 27, 2026

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Nvidia

Senior Formal Verification Engineer

Israel, Tel Aviv

We are looking for a Formal Verification Engineer for our NVIDIA Networking team! This is an exciting opportunity to join a hardworking Pre-Silicon …

Added Oct 27, 2026

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Nvidia

Senior ASIC Verification Engineer

US, TX, Austin

… the world. This is our life’s work, to amplify human inventiveness and intelligence. The NVIDIA System-On-Chip (SOC) group is looking for an experienced ASIC Verification Engineer! In this position you will have the …

Added Oct 27, 2026

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Nvidia

Senior Full-Chip RTL Integration Engineer

US, CA, Santa Clara +1 location

… of new process technology adoption by joining NVIDIA's Advanced Technology Group! We are looking for a Full-Chip RTL Integration Engineer to join our dynamic and growing FE-ASIC development team. In this role, you will …

Added Oct 27, 2026

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Nvidia

Senior ASIC Verification Engineer - GPU

US, CA, Santa Clara

At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification …

Added Oct 27, 2026

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Nvidia

Senior Verification Engineer, Switch SoC

India, Bengaluru 2 postings

We are currently seeking Verification Engineer with strong verification fundamentals to work in Switch Silicon group. You'll join a group of …

Added Oct 27, 2026

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Nvidia

Senior Firmware PHY Verification Engineer

Israel, Tel Aviv

NVIDIA is looking for an excellent Senior Firmware Verification Engineer for NVIDIA FW PHY verification Group. The person will be part of FW PHY …

Added Oct 27, 2026

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Nvidia

Formal Verification Engineer

China, Shanghai

The NVIDIA GPU clocks group is looking for excellent Senior Formal Verification engineers to join the team. The Team is responsible for crafting all aspects of GPU …

Added Oct 27, 2026

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Intel

Senior SoC Physical Layout & Full-Chip Integration Engineer

US, Oregon, Hillsboro +2 locations

Pay posted by employer$122,440–$232,190 USD per year

About the Role Join the Design Technology Platform (DTP) organization within Intel Foundry and help drive the development of the …

Added Oct 27, 2026

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Nvidia

Senior Physical Design Engineer

Israel, Tel Aviv +1 location

NVIDIA is looking for best-in-class Physical Design Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best …

Added Oct 27, 2026

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Nvidia

Senior ASIC Design Engineer

US, CA, Santa Clara +1 location

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two …

Added Oct 27, 2026

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Intel

Senior Verification Engineer

Ireland, Leixlip

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Minimum Qualifications · employer excerpt

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
10+ years of experience in functional design verification of ASIC, SOC or FPGA designs with expertise in System Verilog, OVM/UVM, and debugging tools.
Proficiency in creating IP test environments and/or using formal verification methods
Strong knowledge of digital design fundamentals and microarchitecture principles.

About this opportunity

Original employer description

Job Details:

Job Description:

The Role and Impact

You will be part of a highly skilled, agile design/verification team developing cutting-edge hardware for the NIC, IPU and AI domains.

As a senior IP Design Verification Engineer, you will play a crucial role in ensuring the functionality and reliability of complex designs. You will technically lead teams in developing verification plans, creating test benches, and building environments to thoroughly validate meaningful parts of the chip — complex IPs and subsystems.

Your work will directly contribute to identifying and resolving bugs in the pre-silicon environment using simulation and/or Formal Property Verification techniques, ensuring robust designs that meet high-performance standards.

We are intentional, fast adopters of AI as a working tool. We bring modern AI assistants and automation into every part of the verification flow — planning, stimulus and checker development, coverage analysis, debug and more.

Business group
You will be joining Intel's Central Engineering Group (CEG), a global organization responsible for designing and verifying industry-leading IPs and architectures that power Intel's NIC, IPU and ASIC products. The group produces innovative technologies and solutions for hyperscalers, cloud providers, networking, AI and other specialized workloads.

As part of this dynamic team, you will contribute to Intel's commitment to advancing silicon and system innovation.

Key Responsibilities

Own verification planning and execution for key IP features across IP and subsystem integration points

Build scalable verification environments and targeted test plans with reusable test benches, checkers, VIPs, and behavioral models

Collaborate closely with architecture, design, and software teams from specification through bringup; contribute across role boundaries when needed to unblock progress and maintain execution quality

Drive ownership of multiple critical blocks and verification components; take full responsibility for functional signoffs and achievement of performance and power metrics

Lead IP delivery to multiple customers while ensuring technical excellence; balance competing requirements, schedules, and resources across teams

Drive convergence of simulation and formal verification into unified bug hunting and coverage closure strategies; evaluate and adopt emerging methodologies including ML-driven verification flows

Mentor and develop verification engineers; establish verification best practices and raise team-level execution quality

Comfortable using AI-assisted development tools as part of everyday workflow; track record of delivering reusable, configurable verification collateral

Qualifications:

Minimum Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
10+ years of experience in functional design verification of ASIC, SOC or FPGA designs with expertise in System Verilog, OVM/UVM, and debugging tools.
Proficiency in creating IP test environments and/or using formal verification methods
Strong knowledge of digital design fundamentals and microarchitecture principles.

Preferred Qualifications

Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field with relevant experience in design verification.
Experience with formal property verification, System Verilog Assertions, code and functional coverage implementation and analysis
Experience collaborating across teams to drive architectural improvements.
Use of AI tools would be an advantage. At a minimum, require someone that is passionate about performing Pre-Silicon DV harnessing the power of AI.
Experience with switching/routing and communications protocols such as Ethernet, and Cryptographic Protocols such IPSec, DTLS and MACSec.
Experience with AMBA protocols such as APB and AXI.
Experience with languages such as SystemC, Python, Perl, Shell scripting and how AI can be used to integrate these in verification flows.

We invite you to bring your leadership, expertise and enthusiasm to a team where your contributions will drive technological progress and create opportunities for impactful learning and growth.

Job Type:

Experienced Hire

Shift:

Shift 1 (Ireland)

Primary Location:

Ireland, Leixlip

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

EU Salary

We offer a total compensation package that ranks among the best in the industry.

Annual Salary Range for this job which could be performed in Ireland is: €75,200.00 - €117,500.00

The compensation range displayed in this posting reflects the minimum and maximum target compensation for this position. Within this range, individual pay is determined by job related skills, experience, and relevant education, training. As part of our total compensation approach, the final offer may include additional pay components and benefits. Your recruiting team will share the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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