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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Santa Clara, California, United States +1 location
… to the world. This is our life’s work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, …
El Segundo, California, United States
… Clearance Status: Active and existing security clearance required on day 1 The Mission Systems FPGA/ASIC and Foundational Software team is seeking a Project Engineer to lead the development of advanced FPGA and …
Cedar Rapids, Iowa, United States
… Clearance Status: Active and existing security clearance required on day 1 The Mission Systems FPGA/ASIC and Foundational Software team is seeking a Project Engineer to lead the development of advanced FPGA and …
Santa Clara, California, United States +1 location
… delivery circuits in state-of-the-art sub-micron CMOS technologies using Cadence tools You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products. Job duties will include …
Bengaluru, Karnataka, India +1 location
… the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and …
Santa Clara, California, United States
… human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer! Someone who is excited to join a …
Santa Clara, California, United States
… human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer! Someone who is excited to join a …
Santa Clara, California, United States 2 postings
… human creativity and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for …
San Jose, California, United States +1 location
Pay posted by employer$214,100–$309,800
… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …
Santa Clara, California, United States +1 location
Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling …
Da Nang, Da Nang City, Vietnam
… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Central Engineering ASIC Design Services Team within Marvell provides chip solutions for next generation 5G carriers, cloud data …
San Jose, California, United States
Pay posted by employer$143,800–$230,000 USD per year
This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, …
Bengaluru, Karnataka, India 2 postings
… : Minimum BTech/BE degree in Electrical/Electronics/Computer science 8+ years of solid digital logic design experience in hands-on and/or technical leadership. Strong technical orientation to lead the activities …
Bengaluru, Karnataka, India
GPU Senior Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation …
US-PR-AGUADILLA-110 ~ Rd 110 N Km 28.8 ~ RD110
Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration …
Durham, North Carolina, United States +2 locations
… in the world and there has never been a more exciting time to join our team! We are seeking a Verification Engineer - New College Graduate for our Memory Management Unit to verify the world’s leading GPUs. What you’ll be …
Irvine, California, United States
… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Principal, Digital IC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the high …
Malaysia, Penang
The Role and Impact As a CPU Design Verification Engineer, you will play a pivotal role in ensuring the functionality and reliability of …
Hillsboro, Oregon, United States +4 locations
Pay posted by employer$122,440–$232,190 USD per year
… with the versatility demanded by modern AI workloads. Position Overview We are seeking an experienced design automation engineer passionate about driving innovation at the intersection between emerging semiconductor …
USA-Mendota Heights-Northland +2 locations
Pay posted by employer$109,700–$175,500 USD per year
The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
