1,000+ matching jobs for “Design Verification Engineer”

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Micron Technology

New College Grad - Design Engineer, DRAM Technology and Products

Boise, ID - Main Site

Design, simulate, and optimize memory circuits, including layout development and verification using …

Added Nov 3, 2026

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RTX

Senior Principal Electrical Engineer-Digital Design - Onsite Tucson, AZ

Tucson, Arizona, United States

… innovate, and team with our engineers to generate and utilize today’s cutting-edge technology to design digital electronics circuits that implement missile guidance, video and digital signal processing. Our …

Added Oct 27, 2026

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Nvidia

ASIC Physical Design Engineer, Netlisting - New College Grad 2026

Santa Clara, California, United States +1 location

… and see how you can make a lasting impact on the world. We are now looking for a motivated ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you want to challenge yourself and be a part …

Added Oct 27, 2026

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Boeing

ASIC Physical Design Engineer — Synthesis and Timing – (Associate or Experienced)

USA - El Segundo, CA

In person
Full time
Regular

Pay posted by employer$98,600–$133,400

… and ECO implementation Ensure clean netlist handoffs and predictable convergence by partnering with RTL, verification, DFT, and backend partner companies Support chip‑level integration, top‑level timing closure, signoff …

Added Oct 12, 2026

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KLA

Sr. Electrical Hardware Design Engineer – Mixed-Signal Sensor Systems

Milpitas, California, United States

Full time
Regular

Pay posted by employer$117,800–$200,300 per year

… enable the world's most sophisticated semiconductor manufacturing processes. As a Sr. Electrical Hardware Design Engineer – Mixed-Signal Sensor Systems, you will play a critical role in the development of instrumented …

Added Oct 15, 2026

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Analog Devices

Senior Manager, Digital Design Engineering

Pudong, Shanghai, China

We are seeking an experienced, hands-on Senior Digital Design Manager to lead digital IC development for cutting-edge optical control ICs in AI data center and cloud …

Added Nov 3, 2026

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Boeing

Experienced or Senior Digital Circuit Card Assembly (CCA) Design Engineer

USA - Huntsville, AL

In person

Pay posted by employer$112,200–$151,800

Focus on electrical design, simulation, verification, and validation testing of high-speed printed circuit board design and electronic …

Added Oct 12, 2026

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Thermo Fisher Scientific

Staff, Systems Design – System Architect

Singapore, Singapore

… sure our food is safe or helping find cures for cancer. Description Join our team as a Staff, Systems Design – System Architect at Thermo Fisher Scientific. In this role, you will provide technical architecture and …

Added Oct 26, 2026

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Micron Technology

Principal/MTS, Analog Design Engineering

Boise, ID - Main Site

Design, optimize, and verify block‑level analog and mixed-signal circuits for DRAM projects. Work with the …

Added Nov 3, 2026

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Cisco Systems

ASIC Physical Design Engineer II (Full Time) - United States

San Jose, California, United States

Pay posted by employer$125,700–$203,100

… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …

Added Oct 27, 2026

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Marvell Technology

Senior Staff Manager, Physical Design

Hsinchu City

Full time
Regular

Marvell is seeking a Senior Manager of Physical Design to lead project-level physical design execution and support team growth at the site. This role is …

Added Nov 3, 2026

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Broadcom

Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization

Austin, Texas, United States +2 locations

Full time
Regular

Pay posted by employer$150,800–$241,200 USD per year

Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization Job Description The Central Engineering Group …

Added Oct 15, 2026

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Boeing

Digital Electronics Circuit & Unit Hardware Design Engineer (Lead or Senior)

USA - El Segundo, CA

In person

Pay posted by employer$138,550–$187,450

Digital Electronics Circuit & Unit Hardware Design Engineer (Lead or Senior) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an …

Added Oct 12, 2026

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Boeing

Digital Electronics Circuit & Unit Hardware Design Engineer (Lead or Senior)

USA - El Segundo, CA

Full time
Regular

Pay posted by employer$146,200–$197,800

Digital Electronics Circuit & Unit Hardware Design Engineer (Lead or Senior) Company: The Boeing Company oeing Space, Intelligence & Weapons Systems has an …

Added Oct 16, 2026

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Cisco Systems

Senior Asic Design - Cisco Silicon One

Caesarea, Israel

Meet the Team Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: …

Added Oct 27, 2026

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Thermo Fisher Scientific

Staff, Systems Design – System Architect

Pleasanton, California, United States

Pay posted by employer$135,900–$170,000

… sure our food is safe or helping find cures for cancer. Description Join our team as a Staff, Systems Design – System Architect at Thermo Fisher Scientific. This role provides architecture and technical leadership …

Added Oct 27, 2026

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Boeing

Design-for-Test (DFT) Engineer — ASIC Backend – (Associate, Experienced, or Lead)

USA - El Segundo, CA +1 location

In person
Full time
Regular

Pay posted by employer$98,600–$133,400

Design and implement DFT architectures: TAP/JTAG, IJTAG (IEEE 1687), Boundary Scan (BSCAN), MBIST, and scan …

Added Oct 12, 2026

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Pfizer

Director, AI Experience Design Lead

New York City, New York, United States +5 locations

Full time
Regular

Pay posted by employer$176,600–$294,300 per year

… Experience function in the Chief Technologist Organization, we are seeking a Director, AI Experience Design Lead to own how Pfizer’s AI looks, sounds, and behaves, and to build and lead the design team that ships …

Added Oct 16, 2026

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Nvidia

Senior Digital Design Engineer - High-Speed I/O and Photonics

Santa Clara, California, United States

… and adaptation algorithms, which then will be translated into RTL and firmware designs. For backend design, you will define, build synthesis constraints and drive timing closure. Evaluating PPA trade-offs based on …

Added Oct 31, 2026

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Intel

Senior Technical Lead - CPU Physical Design

Bengaluru, Karnataka, India

Full time
Regular

Added Oct 27, 2026

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Intel

Senior Technical Lead - CPU Physical Design

Bengaluru, Karnataka, India

Full time
Regular

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About this opportunity

Original employer description

Job Details:

Job Description:

We are seeking a highly experienced and motivated Senior Technical Lead - CPU Physical Design to lead the physical implementation of next-generation CPU IPs from floorplanning through signoff. The successful candidate will provide technical leadership across the physical design lifecycle, driving PPA optimization, execution excellence, methodology adoption, and design convergence for high-performance CPU products. The ideal candidate brings deep expertise in advanced-node physical design, strong technical leadership, and a proven track record of delivering complex CPU, SoC, or high-performance IP designs. Key Responsibilities Lead physical design execution for CPU IPs from design planning through signoff. Provide technical leadership for: Floorplanning and Design Planning Placement and Optimization Clock Tree Synthesis Routing and Physical Verification Timing Closure Power and Area Optimization Signoff Readiness Drive PPA convergence and deliver aggressive frequency, power, and area targets. Define and execute physical design strategies for advanced CPU architectures and technology nodes. Partner closely with Architecture, RTL, Circuit Design, DFT, CAD, Power, and Signoff teams to drive implementation success. Lead resolution of complex implementation, timing, congestion, and power challenges. Drive methodology improvements and adoption of best practices across multiple projects. Evaluate implementation tradeoffs and provide technical recommendations that influence architecture and design decisions. Mentor and guide engineers across the physical design organization. Collaborate with CAD teams to improve efficiency through automation, methodology enhancements, and AI-driven workflows. Support planning, estimation, risk assessment, and execution tracking for physical design deliverables. Contribute to hiring, technical interviews, and development of engineering talent.

Qualifications:

Minimum Qualifications M.Tech/MS/PhD in Electrical Engineering, Computer Engineering, VLSI, or a related discipline. 14+ years of industry experience in ASIC or CPU Physical Design. Proven experience delivering successful products through complete physical implementation and signoff cycles. Strong expertise in: Floorplanning and Design Planning Placement and Optimization Clock Tree Synthesis Routing and Closure Static Timing Analysis Signal Integrity Power Integrity and EM/IR Physical Verification Hands-on experience with industry-standard implementation tools such as: Synopsys Fusion Compiler ICC2 Cadence Innovus PrimeTime StarRC RedHawk Calibre Strong scripting and automation experience using: Python Tcl Shell Preferred Qualifications Experience delivering high-performance CPU core, cache, fabric, or compute IP designs. Experience with advanced process technologies such as Intel 18A/14A, TSMC N3/N2, or equivalent. Deep understanding of: Physical design methodologies Advanced timing closure techniques Hierarchical implementation Variation-aware design methodologies Power-aware implementation Experience leading geographically distributed teams. Experience driving CAD methodology improvements and automation initiatives. Familiarity with AI, Machine Learning, and Agentic AI applications for design automation and productivity enhancement.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Keywords also found in description

Full time
Regular
Silicon Hardware Engineering

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