SoC Design Verification Engineer · AnywhereEdit
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287 matching jobs for “SoC Design Verification Engineer”

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Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.

Marvell Technology

Principal, IC Digital Design Engineer

Irvine, California, United States

  • Full time
  • Regular

… trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Principal, Digital IC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the high …

Added Nov 3, 2026

Nvidia

Senior ASIC Design Engineer - Memory Subsystem

Santa Clara, California, United States

… join the team and see how we can make a lasting impact on the world. NVIDIA is looking for an Senior ASIC Design Engineer to join our Memory Subsystem Team! What you'll be doing : As a member of our Memory Subsystem …

Added Oct 27, 2026

Intel

Principal Engineer - Standard Cell Design

Santa Clara, California, United States +4 locations

Pay posted by employer$220,920–$311,890 USD per year

… deliver power, performance, and scalability across future nodes and products. We're looking for a Principal Engineer who thrives on solving hard problems, someone who can bring deep circuit expertise and help define the …

Added Oct 27, 2026

Cisco Systems

ASIC Design Engineer | Exp 8+ Years

Bengaluru, Karnataka, India

… company in the world! Your Impact Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of …

Added Oct 27, 2026

Intel

Quantum IC Package Substrate Design Engineer

Hillsboro, Oregon, United States

Pay posted by employer$122,440–$172,860 USD per year

… leading academic institutions worldwide. We are seeking an exceptional Quantum IC Substrate Package Layout Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for …

Added Oct 27, 2026

Intel

E-core CPU Layout Design Engineer

Malaysia, Penang +1 location

The Role and Impact As an E-Core (Atom) CPU Layout Design Engineer, you will play a pivotal role in shaping the physical layout of Intel's cutting-edge Atom …

Added Oct 27, 2026

Intel

E-core CPU Clock Design Engineer

Malaysia, Penang

… CPU products. Whether you're a college graduate eager to launch your career or an experienced engineer ready to solve some of the industry's most complex technical challenges, you'll have the opportunity to …

Added Oct 27, 2026

Analog Devices

Digital Design Manager

China, Beijing, Haidian, Xixiaokou

Technical Leadership Lead block-level and chip-level digital architecture definition, RTL design, and implementation for digital SoCs. Drive key architecture and micro-architecture decisions, balancing …

Added Nov 3, 2026

Nvidia

ASIC Design Engineer, BOOT and Power Management

Bengaluru, Karnataka, India +1 location

… work. Come join the team and see how you can make a lasting impact on the world. We are now looking for RTL Design engineers for our BOOT and Power management Subsystem Design deployed in Automotive and Client chips. As …

Added Oct 28, 2026

Nvidia

ASIC Design Engineer - New College Grad 2027

Santa Clara, California, United States

… people in the world and there has never been a more exciting time to join our team! We are seeking an ASIC Design Engineer - New College Graduate to implement the world’s leading SoC's and GPU's. This position offers the …

Added Oct 27, 2026

Nvidia

SRAM Circuit Design Engineer - New College Grad 2026

Santa Clara, California, United States

… (DIP) group at NVIDIA develops IP for every chip designed at NVIDIA. This group works closely with internal SOC design, silicon testing, and productization teams that turn our IP into products that change the world. One …

Added Oct 27, 2026

Location reference: GeoNames (CC BY 4.0), normalized by Referizz.

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