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US, CA, Santa Clara
Are you seeking an outstanding opportunity? We are looking for a Senior Photonic Layout Design Engineer – someone who is excited to join a growing group of diverse individuals …
US, CA, Santa Clara +5 locations
… to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions! This …
Malaysia, Penang
The Role and Impact As a Senior CPU Circuit Design Engineer, you will play a pivotal role in designing and developing custom digital …
USA - Berkeley, MO +1 location
Pay posted by employer$136,850–$185,150
… without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law. …
India, Bangalore
The Role and Impact Join a Team That Defines the Heartbeat of Next-Generation CPUs. As a CPU Senior Clock Design Engineer, you will contribute to the design, implementation, analysis, and optimization of …
India, Bangalore
Position Overview As a Platform Hardware Design Engineer, you will provide technical leadership for the architecture, design, integration, bring-up, and …
US, CA, Santa Clara +1 location
Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals …
India, Bangalore
GPU Senior Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform …
Malaysia, Penang
The Role and Impact As a Senior CPU Circuit Design Engineer, you will play a pivotal role in designing and developing custom digital …
US, CA, Santa Clara +1 location
We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and …
US, Arizona, Phoenix +2 locations
Pay posted by employer$141,910–$269,100 USD per year
… we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. Intel Foundry will be …
US, CA, Santa Clara +1 location
NVIDIA is seeking an experienced ASIC Floorplan Engineer to design and implement the world's leading SOCs, CPUs, and GPUs. This position offers you a unique …
Israel, Haifa
… competitiveness across Intel's CPU portfolio. About the Job We are looking for an experienced Logic RTL Design Engineer to join the Out-of-Order team. In this role: you will define micro-architecture, develop RTL, and …
Mossville, Illinois
Pay posted by employer$112,710–$169,060
… team is expanding its portfolio to include a comprehensive range of electric components. In the position of Senior Design Engineer, you will spearhead the development of next-generation motor and generator components, …
Warren, Michigan, United States
… through collaboration, and encourage community engagement through volunteerism. The Role: We are seeking a Senior Electrical Design Automation Engineer to lead the integration, extension, and automation of Siemens Capital …
US, Texas, Austin +1 location
Pay posted by employer$141,910–$269,100 USD per year
The Role and Impact As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge …
Malaysia, Penang
The Role and Impact As a CPU Design Verification Engineer, you will play a key role in ensuring the reliability and functionality of Intel's …
Malaysia, Penang
The Role and Impact As a CPU Design Verification Engineer, you will play a pivotal role in ensuring the functionality and reliability of …
India, Bangalore
Intel is seeking an experienced Logic Design engineer for the Intel Chassis Group, which is chartered to deliver the chassis for SoCs within Intel. The …
Santa Clara, California, United States
Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
