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Bengaluru, Karnataka, India
NVIDIA System-On-Chip (SOC) group is hiring for an ASIC Design Engineer! The complexity of the chips we build has increased manifold over the years. We are now …
Bengaluru, Karnataka, India
… and see how you can make a lasting impact on the world! What you’ll be doing: Responsible for verifying the ASIC design, architecture and micro-architecture using advanced verification methodologies. Expected to …
Hillsboro, Oregon, United States +5 locations
Pay posted by employer$122,440–$172,860 USD per year
… engineering execution and expanding market opportunities through internal product development and external ASIC design services. Guided by a data-driven approach, CEG drives scalable, impactful solutions across Intel's …
Santa Clara, California, United States +2 locations
Pay posted by employer$122,440–$232,190 USD per year
Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet …
Santa Clara, California, United States +2 locations
Pay posted by employer$141,910–$232,190 USD per year
Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet …
Santa Clara, California, United States +1 location
Pay posted by employer$141,910–$269,100 USD per year
Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet …
Bengaluru, Karnataka, India
… the emulation env, build netlists and use the same to speed up the development cycle and find potential ASIC issues during pre-silicon phase • Work with leading emulation vendors to troubleshoot issues. What You’ll …
Canada, Remote
… their best work. Join us and discover how you can build a lasting impact on the world! As a Senior Formal Verification Engineer at NVIDIA, you will verify ASICs developed at the forefront using formal verification tools. You …
Beersheba, Southern District, Israel +1 location
… What you will be doing: Join the Tel Aviv or Beer-Sheva group, working on RiscV processors platform. Verification for chip blocks according to specifications under challenging constraints and with high orientation to …
Israel, Haifa
… fast adopters of AI as a working tool, and actively use AI throughout our architecture, design, verification, and development workflows. If you are energized by defining things that have never existed before, value …
Fort Collins, Colorado, United States +1 location
Pay posted by employer$121,900–$195,000 USD per year
… for developing thermal management and robust socketing solutions for test and validation PCBs for Broadcom ASIC products targeted at hyperscale data center applications. Broadcom’s market leading products are enabling …
US, CA, Remote +4 locations
… their best work. Join us and discover how you can build a lasting impact on the world! As a Senior Formal Verification Engineer at NVIDIA, you will verify ASICs developed at the forefront using formal verification tools. You …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
You will support requirements capture and ASIC / FPGA digital architecture. You will implement ASIC / FPGA digital design using RTL. You will support …
Santa Clara, California, United States
We are now looking for a Senior ASIC Design Engineer to join our DFT team! NVIDIA has continuously reinvented itself over two decades. Our …
US, CA, Remote +5 locations
… At NVIDIA, we value innovation, collaboration, and excellence. Join our outstanding team as a Senior Formal Verification Engineer and be at the forefront of developing modern technology that builds the future. This role offers …
Grand Rapids, Michigan, United States +2 locations
Summary GE Aerospace is seeking an experienced Staff Engineer – FPGA Design/Verification to lead the development of custom logic for advanced avionics hardware. This …
Caesarea, Israel +1 location
Silicon One is seeking a CAD Engineer to join the Cisco Silicon One Physical Design team. Meet the Team You'll be part of the Cisco Silicon One …
San Jose, California, United States
Pay posted by employer$155,000–$222,600
include: Support DFT implementation for ASIC / SoC blocks and subsystems Implement and validate scan insertion, scan compression, OCC, MBIST, boundary …
El Segundo, California, United States +1 location
Verification environment architecture and design using SystemVerilog with UVM/UVM-F Creation of written test plan, …
Santa Clara, California, United States +1 location
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
