585 matching jobs for “Staff Physical Design Engineer”
How results work Exact titles rank first, then title variations and keywords in descriptions. These labels aren't qualification scores. Without keywords, recently added jobs appear first.
Bengaluru, Karnataka, India
Technical Ownership Own end-to-end physical implementation (floorplanning, power planning, placement, CTS, routing, ECO) for complex blocks or …
Added Nov 3, 2026
CLOSED-India, Bangalore, Aveda Meta
Technical Ownership Own end-to-end physical implementation (floorplanning, power planning, placement, CTS, routing, ECO) for complex blocks or …
Added Nov 3, 2026
Austin, Texas, United States
include: Work with design teams across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration in …
Added Nov 3, 2026
Bengaluru, Karnataka, India
The Aerospace , Defense and Communications (ADC) Business Unit at Analog devices is seeking a Staff Digital Design Engineer . The ADC group is a high-impact, innovation focused engineering team working on …
Added Nov 3, 2026
Bengaluru, Karnataka, India
- Own full-chip and block-level physical verification signoff, including DRC, LVS, ERC, PERC and antenna/ESD checks for multiple complex SoCs. - …
Added Nov 3, 2026
Bengaluru, Karnataka, India
Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, partitioning, …
Added Oct 5, 2026
Bengaluru, Karnataka, India
As a Staff Digital Design Engineer, you will lead complex digital design projects and provide technical leadership for …
Added Nov 3, 2026
Bengaluru, Karnataka, India
As a Staff Digital Design Engineer, you will lead complex digital design projects and provide technical leadership for …
Added Nov 3, 2026
Bengaluru, Karnataka, India 3 postings
As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing …
Added Nov 3, 2026
CLOSED-India, Bangalore, Aveda Meta
As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing …
Added Nov 3, 2026
Malaysia, Penang 2 postings
… motivated engineering talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build …
Added Oct 27, 2026
Bengaluru, Karnataka, India
Design and develop innovative, reliable, and efficient bench hardware and software solutions for complex digital …
Added Nov 3, 2026
Bengaluru, Karnataka, India
Key member of design verification team for SOC or subsystem design pre silicon verification. The candidate will be responsible …
Added Nov 3, 2026
Bengaluru, Karnataka, India
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and …
Added Nov 3, 2026
Hsinchu - Chang Yih, Taiwan
Design , implement, and debug complex logic designs. Integrate your IP into larger and more complex IPs. Support …
Added Nov 3, 2026
Wilmington, Massachusetts, United States
Pay posted by employer $131,285–$190,108
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and …
Added Nov 3, 2026
Durham, North Carolina, United States
As a Staff Analog Design Engineer at Analog Devices, you will lead the design and development of complex analog and …
Added Nov 3, 2026
USA-Mendota Heights-Northland
Pay posted by employer $109,700–$175,500 USD per year
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join …
Added Oct 5, 2026
Bengaluru, Karnataka, India
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and …
Added Nov 3, 2026
China, Beijing, Haidian, Xixiaokou
… definition, RTL development, synthesis, timing closure, DFT collaboration, and close partnership with physical design teams to deliver robust, production‑ready designs. Key Responsibilities: Define and develop …
Added Nov 3, 2026
Malaysia, Penang
Same role posted 2 times, once per location
Qualifications · employer excerpt Bachelor or Master Degree in Electrical and Electronic Engineering, Computer Engineering, Computer Science, or a related discipline, with at least 3 years of experience in IP or SoC RTL/Logic Design. Strong knowledge of one or more of the following areas:IP/subsystem architecture, I/O architecture, and industry-standard high-speed bus protocols.SoC/ASIC design methodology and industry-standard front-end development practices.SoC…
About this opportunity Original employer description
Job Details:
Job Description: Devices Development Group Malaysia (DDG-MYS) Client SoC Team is seeking highly motivated engineering talent to join Intel’s next-generation Client SoC development team as a SoC RTL/Logic Staff Design Engineer. In this role, you will contribute to Intel’s latest Client product families, helping build world-changing technology that reaches people around the globe.
Key Responsibilities
Own DDG internal IP RTL design and development or integrate high-performance and high-bandwidth IP into Client SoC platforms. Define, implement, and deliver new IP features, change requests, and feature enhancements. Drive IP-to-SoC handoff quality, ensuring design completeness, compliance, and readiness for downstream integration. Perform logic and RTL integration into SoC, including power intent definition, signal handling across power planes and clock domains, and delivery of front-end collateral for system and software integration. Develop design solutions and collaborate closely with verification teams to validate functionality, features, and integration readiness. Execute front-end quality checks across RTL static analysis, synthesizability, timing and power convergence, netlist quality, formal equivalence verification, and related design quality milestones.
Qualifications: Bachelor or Master Degree in Electrical and Electronic Engineering, Computer Engineering, Computer Science, or a related discipline, with at least 3 years of experience in IP or SoC RTL/Logic Design. Strong knowledge of one or more of the following areas: IP/subsystem architecture, I/O architecture, and industry-standard high-speed bus protocols. SoC/ASIC design methodology and industry-standard front-end development practices. SoC fabric and interconnect design. RTL design using Verilog and System Verilog. Industry front-end and RTL tools, flows, and design methodologies. Experience using AI tools or AI-assisted engineering workflows to improve RTL/Logic development productivity, including design exploration, code generation, review, debug, documentation, and front-end quality checks. Ability to orchestrate efficient development workflows by combining domain expertise, automation, scripting, AI-assisted tools, and structured engineering practices to accelerate delivery while maintaining design quality. Pre-silicon or post-silicon lab debug and power-on experience. Excellent communication, collaboration, problem-solving, and teamwork skills.
Job Type: Experienced Hire
Shift: Shift 1 (Malaysia)
Primary Location: Malaysia, Penang
Additional Locations:
Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust N/A
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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