648 matching jobs for “ASIC Design Engineer”

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Intel

GPU Logic Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

GPU Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation …

Added Oct 27, 2026

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Marvell Technology

Principal Engineer, Physical Design

Hsinchu City

Full time
Regular

… and lead. Your Team, Your Impact Built on decades of expertise and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure …

Added Nov 3, 2026

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Analog Devices

Senior Digital Design Engineer

Bengaluru, Karnataka, India +1 location

… & Scope, Business Impact). Develop and optimize floorplans (macro placement, IO ring planning, power grid design, congestion/area/timing analysis) Execute place-and-route, clock tree synthesis, and timing closure using …

Added Nov 3, 2026

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RTX

Principal FPGA/ASIC Verification Engineer (Onsite)- Active Secret

US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A

… aerospace and defense. We are seeking an experienced and highly motivated Principal Electrical or Computer Engineer to lead the design, implementation, and verification of advanced testbenches for a portfolio of …

Added Oct 27, 2026

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Analog Devices

Senior Digital Design Engineer

United Kingdom, Edinburgh, SC, Freer

… with unmatched technologies that sense, measure, and connect. Analog Devices is seeking a senior digital design engineer for its Data Center & Energy (DCE) group in Limerick, Ireland. Within DCE, we deliver …

Added Nov 3, 2026

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Intel

GPU Logic Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

The Role and Impact: As a GPU Logic Design Engineer, you will be instrumental in developing the next generation of graphics IPs, contributing directly …

Added Oct 27, 2026

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Analog Devices

Principal Engineer, Design Verification

United Kingdom, Edinburgh, SC, Freer +2 locations

… phase, through verification planning, implementation, execution, and release of products to customers. The Design Verification Engineer will collaborate with the wider ADI technical community which affords an opportunity …

Added Nov 3, 2026

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Cisco Systems

ASIC STA Technical Lead

San Jose, California, United States

Pay posted by employer$186,900–$267,700

… and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and …

Added Oct 27, 2026

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Nvidia

Applied Research Engineer, Chip Design

Santa Clara, California, United States

… of innovation that's fueled by phenomenal technology—and outstanding people! We are seeking a world-class engineer to drive applied research at the intersection of AI and ASIC design. Large language models, coding agents, …

Added Oct 31, 2026

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Cisco Systems

Senior Physical Design Engineer

Caesarea, Israel +1 location

Cisco Silicon One is seeking a Physical Design Technical Leader. Meet the Team Physical Design team within Cisco Silicon One is responsible for the entire …

Added Oct 27, 2026

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Cisco Systems

IC Package Design Engineer

San Jose, California, United States

Pay posted by employer$155,000–$222,600

• Contribute to package design activities including planning, floorplanning, pinout optimization, stack‑up definition, and high‑speed …

Added Oct 27, 2026

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Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States +2 locations

Full time
Regular

Pay posted by employer$143,800–$230,000 per year

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, …

Added Oct 5, 2026

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Broadcom

Senior Custom ASIC Engineering Lead

San Jose, California, United States

Full time
Regular

Pay posted by employer$143,800–$230,000 USD per year

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, …

Added Oct 5, 2026

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Intel

Quantum Qubit Design Engineer

Hillsboro, Oregon, United States +7 locations

Full time
Regular

Pay posted by employer$141,910–$269,100 USD per year

… approach spans the entire quantum compute stack while harnessing the power of Intel's 18A process and design infrastructure. We are seeking an exceptional Quantum Design Engineer to join our pioneering quantum …

Added Oct 27, 2026

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Nvidia

Senior Chip Design Verification Engineer

Beersheba, Southern District, Israel +1 location

NVIDIA is looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high …

Added Oct 27, 2026

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RTX

Senior FPGA Design Engineer

Tucson, Arizona, United States

… a safer, more secure world. Join us and help shape the future of aerospace and defense. As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device families including: Xilinx, Altera, …

Added Oct 27, 2026

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RTX

Senior FPGA Design Engineer

Tewksbury, Massachusetts, United States

Added Oct 27, 2026

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RTX

FPGA Design Engineer II

Tucson, Arizona, United States

… threat. Our team solves tough, meaningful problems that create a safer, more secure world. As an FPGA Design Engineer II you will develop FPGA designs for all major vendors and device families including: Xilinx, …

Added Oct 27, 2026

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Intel

Senior Design Verification Engineer

Santa Clara, California, United States

Full time
Regular

Pay posted by employer$164,470–$311,890 USD per year

About the Role Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own end-to-end verification of …

Added Oct 27, 2026

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Boeing

ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - SoCal

USA - El Segundo, CA +1 location

In person
Full time
Regular

Pay posted by employer$85,850–$116,150

Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog. Develop self-checking …

Added Oct 13, 2026

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Intel

GPU Logic Design Engineer

Bengaluru, Karnataka, India

Full time
Regular

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Qualifications · employer excerpt

Bachelor's degree or Masters in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
4+ years M.Tech and 5+ B.tech with hands on experience in RTL coding, logic design, and verification processes for GPU or similar domains.
Proficiency in Verilog/System Verilog and familiarity with hardware design flows and methodologies.
Experience with synthesis, timing analysis, and structural design using tools such as Lint and CDC.
Knowledge of computer architecture, microarchitecture, and static timing analysis.

1 more in the full description below.

About this opportunity

Original employer description

Job Details:

Job Description:

The Role and Impact:

As a GPU Logic Design Engineer, you will be instrumental in developing the next generation of graphics IPs, contributing directly to the design and optimization of register transfer level (RTL) coding for cutting-edge GPU blocks. Your day-to-day work will involve creating high-performance logic designs, ensuring they meet power, performance, area, and timing goals. The work you do will be integral to delivering innovative solutions for Intel's graphics products, directly impacting millions of users worldwide.

Business Group:

The Graphics IP team within Intel's Data Center Group (DCG) is dedicated to delivering world-class graphics and compute solutions for integrated, discrete, and data center AI products. Leveraging continuous innovation and engineering excellence, the team supports Intel's overall mission to drive technological advancements and deliver high-performance computing solutions. This role places you at the forefront of industry-leading graphics IP development efforts.

Key Responsibilities:

Develop logic designs and create RTL code for graphics IPs, including compute, display, and media blocks.
Optimize logic designs to meet power, performance, area, and timing goals, ensuring design integrity for physical implementation.
Participate in defining the architecture and microarchitecture features of GPU blocks.
Review verification plans to ensure design features are accurately validated across hierarchies.
Drive unit-level verification and resolve RTL test failures, implementing corrective measures to ensure design correctness.
Collaborate with SoC teams to ensure high-quality integration of GPU blocks.
Utilize industry-standard tools and methodologies for design and verification.

Qualifications:

Minimum Qualifications:

Bachelor's degree or Masters in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
4+ years M.Tech and 5+ B.tech with hands on experience in RTL coding, logic design, and verification processes for GPU or similar domains.
Proficiency in Verilog/System Verilog and familiarity with hardware design flows and methodologies.
Experience with synthesis, timing analysis, and structural design using tools such as Lint and CDC.
Knowledge of computer architecture, microarchitecture, and static timing analysis.
Proficiency in programming/scripting languages such as Python, Perl, or Shell scripting for automation.

Preferred Qualifications:

Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
Strong analytical skills and experience in low-power design and power optimization techniques.
Familiarity with ASIC design flow and industry-standard verification tools/methodologies.
Exposure to ML/AI and HPC workload knowledge.
Effective team player with strong communication skills and a continuous learning mindset.

Join a team that thrives on innovation and excellence, where your contributions will shape the future of graphics technology. Apply today and take the next step in advancing your career with Intel.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Keywords also found in description

Full time
Regular
Silicon Hardware Engineering

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