Lead Verification and Validation Engineer
Noida, Uttar Pradesh, India +1 location
Summary Lead Verification & Validation Engineer will be responsible for the delivery of the of HVDC Controls & Protection …
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Noida, Uttar Pradesh, India +1 location
Summary Lead Verification & Validation Engineer will be responsible for the delivery of the of HVDC Controls & Protection …
Canada, Remote
… their best work. Join us and discover how you can build a lasting impact on the world! As a Senior Formal Verification Engineer at NVIDIA, you will verify ASICs developed at the forefront using formal verification tools. You …
Westford, Massachusetts, United States +1 location
NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O controllers for the …
Bengaluru, Karnataka, India
… Development Group, responsible for creating leading Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers. We are looking for a Mixed Signal IP Verification …
US, CA, Remote +4 locations
… their best work. Join us and discover how you can build a lasting impact on the world! As a Senior Formal Verification Engineer at NVIDIA, you will verify ASICs developed at the forefront using formal verification tools. You …
Israel, Tel Aviv
NVIDIA is looking for an excellent Senior Firmware Verification Engineer for NVIDIA FW PHY verification Group. The person will be part of FW PHY verification of NVIDIA …
Avezzano (AQ), Italy
… and manufacturability requirements. • Develop and validate test sequences, NAND test algorithms, and verification methodologies at block and chip level. • Collaborate with multi-functional teams and Product Engineering …
Hillsboro, Oregon, United States +3 locations
Pay posted by employer$149,600–$284,580 USD per year
Shape the Future of Advanced Semiconductor Technology at Intel Join Intel's Design Technology Platform (DTP) organization and become part of a world-class team enabling the next generation …
Singapore-Yishun
Foundation IP Memory Verification Engineer We are looking for energetic and passionate design engineers to join our Central Engineering Group …
Santa Clara, California, United States +4 locations
NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our GPU Memory Subsystem IP verification Team! At NVIDIA, we have crafted a team of …
Santa Clara, California, United States
NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world’s leading GPUs. In this role, you will be doing unit level verification of …
Leixlip, Leinster, Ireland
The Role and Impact As a Sr Deep Learning Hardware Verification Engineer, you will play a pivotal role in shaping the future of AI hardware by validating and optimizing …
IND19-01-Bengaluru-EPIP 122 (Phase II)
Summary We are seeking a detail-oriented Electronics Verification & Validation Engineer to support product-level testing, verification, and validation of next-generation …
USA - Oklahoma City, OK
Pay posted by employer$118,150–$159,850
Leads the design, development, and completion of test and verification of software products to ensure quality, reliability, …
Bengaluru, Karnataka, India
… develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical …
Tewksbury, Massachusetts, United States +1 location
… random tests, while tracking functional and code coverage using UVM Create complete documentation including verification plan and report Demonstrate self-motivation, with little supervision required Work cooperatively with …
Hyderabad - Phoenix Aquila, India
As a CAD Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, …
Singapore-Yishun
We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the …
Marlborough, Massachusetts, United States +1 location
… random tests, while tracking functional and code coverage using UVM Create complete documentation including verification plan and report Demonstrate self-motivation, with little supervision required Work cooperatively with …
Fullerton, California, United States +1 location
Verification environment architecture and design using SystemVerilog with UVM/UVM-F Creation of written test plans, …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.