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Bengaluru, Karnataka, India
… 16nm, 7nm, 5nm, 4nm). Drive timing closure, congestion resolution, IR/EM, signal integrity, and physical verification (DRC/LVS/antenna) to meet PPA and quality targets. Define and refine hierarchical PNR strategies, IO …
CLOSED-India, Bangalore, Aveda Meta
… 16nm, 7nm, 5nm, 4nm). Drive timing closure, congestion resolution, IR/EM, signal integrity, and physical verification (DRC/LVS/antenna) to meet PPA and quality targets. Define and refine hierarchical PNR strategies, IO …
Boise, ID - Main Site
Define and implement DFT, testmode, and related design methodology requirements for current and future memory products Design and evaluate new DFT circuit and …
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
… missiles/effectors, radars, and electronic warfare systems. The team leverages digital, analog, and power design skills to provide support throughout the product lifecycle from architecture and design through production …
IND-Pune EON Kharadi Infrastructure
Role Overview As a Lead Physical Design Engineer, you will drive physical design implementation for complex SoC architectures on 5nm and advanced …
Austin, Texas, United States
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP …
Chandler, Arizona, United States
Pay posted by employer$109,700–$175,500 USD per year
Role Overview Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design …
Santa Clara, California, United States
We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This …
Córdoba, Cordoba, Argentina
include: · RTL design/coding. · Testbench simulation and verification. · Debug design issues and ensure functional correctness. · …
Bengaluru, Karnataka, India
The Role and Impact As an IP Logic Design Engineer, you will be instrumental in developing and optimizing logic designs for high-performance IP …
Brno, South Moravian, Czechia
Position Summary As a Junior System Engineer – Verification & Investigation , you will support the development and continuous improvement of our Desktop …
Hyderabad, Telangana, India
The Automotive Networking Business Unit at Analog Devices, Inc. (ADI) is seeking an experienced Staff Analog Design Engineer to join its Hyderabad design team. In this P4 technical leadership role, you will architect and …
Bengaluru, Karnataka, India
Intel is looking for an experienced Analog Designer to join the IO Design Team in Bengaluru. In this role, you will be responsible for leading the design and development of advanced …
Israel, Yokneam
NVIDIA is looking for a strong hands-on verification manager to lead the growing SDK Verification team. This role combines leadership with deep technical …
Malaysia, Penang
The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in the integration and pre-silicon validation of multiple IPs within …
Bengaluru, Karnataka, India
… knowledge. Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules). Strong layout knowledge in advanced submicron FinFET processes, including …
Christchurch, Canterbury, New Zealand
… accurate horizontal and vertical guidance. Working in a team, you will be involved in the specification, design, documentation, and execution of testing of the machine control software and hardware. You will work …
Bengaluru, Karnataka, India
include: ►Interface as the central resource with design, test, application, software and marketing teams as the product(s) move from design to completion and …
Bengaluru, Karnataka, India +1 location
… & Scope, Business Impact). Develop and optimize floorplans (macro placement, IO ring planning, power grid design, congestion/area/timing analysis) Execute place-and-route, clock tree synthesis, and timing closure using …
Hsinchu City
… of flexible business models. In this unique role, you’ll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor chips in a …
Location reference: GeoNames (CC BY 4.0), normalized by Referizz.
