FPGA/ASIC Engineer II (Onsite)
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
You will support requirements capture and ASIC / FPGA digital architecture. You will implement ASIC / FPGA digital design using RTL. You will support …
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US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A
You will support requirements capture and ASIC / FPGA digital architecture. You will implement ASIC / FPGA digital design using RTL. You will support …
Santa Clara, California, United States
Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products …
Fort Collins, Colorado, United States +1 location
Pay posted by employer$121,900–$195,000 USD per year
… for developing thermal management and robust socketing solutions for test and validation PCBs for Broadcom ASIC products targeted at hyperscale data center applications. Broadcom’s market leading products are enabling …
Santa Clara, California, United States +1 location
NVIDIA is seeking an experienced ASIC Floorplan Engineer to design and implement the world's leading SOCs, CPUs, and GPUs. This position offers …
Israel, Haifa
Irvine, California, United States +2 locations
Pay posted by employer$129,400–$207,000 per year
Irvine, California, United States +2 locations
Bengaluru, Karnataka, India
… the emulation env, build netlists and use the same to speed up the development cycle and find potential ASIC issues during pre-silicon phase • Work with leading emulation vendors to troubleshoot issues. What You’ll …
San Jose, California, United States
Pay posted by employer$167,700–$245,200
… experiment more, and work quickly. Join us to power the future of the digital world. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center …
San Jose, California, United States
Pay posted by employer$155,000–$222,600
include: Support DFT implementation for ASIC / SoC blocks and subsystems Implement and validate scan insertion, scan compression, OCC, MBIST, boundary …
Santa Clara, California, United States
NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world’s leading GPUs. In this role, you will be doing unit level …
San Jose, California, United States
Pay posted by employer$186,900–$267,700
… in the lab. Minimum Qualifications Bachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ years of …
Israel, Haifa
Santa Clara, California, United States +1 location
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team …
San Jose, California, United States
Pay posted by employer$155,000–$222,600
… more, and work quickly. Join us to power the future of the digital world. Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII implementation flow for advanced semiconductor nodes. …
Caesarea, Israel +1 location
Silicon One is seeking a CAD Engineer to join the Cisco Silicon One Physical Design team. Meet the Team You'll be part of the Cisco Silicon One …
McKinney, Texas, United States
The selected candidate will define ASIC/FPGA requirements from system specifications, develop digital architectures, implement RTL designs, and …
El Segundo, California, United States +1 location
… using VHDL or SystemVerilog Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow Contribute to engineering estimates for new program pursuits. Provide technical …
Santa Clara, California, United States
We are now looking for a Senior ASIC Design Engineer to join our DFT team! NVIDIA has continuously reinvented itself over two decades. Our …
Westford, Massachusetts, United States +1 location
NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O controllers for the …
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